Strobed Voltage Comparator Circuit for Low-Power Current Cutoff

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Solution Overview

Problem

Conventional voltage comparator circuits consume unnecessary current after determining the output condition, which contributes to higher power consumption and has not been effectively addressed in existing designs.

Innovation Solution

A voltage comparator circuit with a current control mechanism that allows source currents to flow only during the comparison operation and cuts them off once the output condition is determined, utilizing a logic circuit and switch element to manage the source currents of FETs, thereby reducing power consumption.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If source currents flow continuously in the FETs to maintain readiness for comparison, then the circuit responds quickly to input changes, but power consumption increases

Engineering Contradiction:
Improveresponse speedVSAvoidpower consumption
Core Design Contradiction:
SpeedVSUse of energy by moving object

Solution Approach 1:

The patent implements periodic action by controlling source currents to flow only during specific periods when comparison is needed, rather than continuously. The current control circuit activates currents during comparison operations and deactivates them during idle periods, achieving both fast response when needed and low power consumption during standby.

Inventive Principle:
Principle #19Periodic action

Solution Approach 2:

The patent applies dynamics by making the source current flow state changeable between active and inactive states based on operational requirements. The current control circuit dynamically adjusts current flow timing, allowing the circuit to transition between high-performance mode and low-power mode seamlessly.

Inventive Principle:
Principle #15Dynamics

2Use of energy by moving object

If source currents are cut off after output determination to reduce power consumption, then power usage decreases, but the circuit must be reactivated for subsequent comparisons

Engineering Contradiction:
Improvepower consumptionVSAvoidcontrol mechanism complexity
Core Design Contradiction:
Use of energy by moving objectVSDevice complexity

Solution Approach 1:

The patent implements feedback through the current control circuit that monitors the operational state of the comparator and automatically activates or deactivates source currents accordingly. This feedback mechanism eliminates the need for complex external control while achieving automatic power management.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The current control circuit provides self-service by autonomously managing current flow based on the circuit's own operational state. The circuit detects when comparison operations are complete and automatically cuts off currents without requiring external intervention, simplifying the overall control architecture.

Inventive Principle:
Principle #25Self-service

3Measurement precision

If source currents flow continuously to maintain amplifier readiness, then measurement precision is maintained, but unnecessary current consumption occurs

Engineering Contradiction:
Improvecomparison accuracyVSAvoidenergy waste
Core Design Contradiction:
Measurement precisionVSLoss of energy

Solution Approach 1:

The patent applies preliminary action by pre-positioning the circuit in a low-power state and only activating source currents when comparison operations are actually needed. The fast switching capability ensures that even with intermittent current flow, the circuit maintains readiness to perform accurate comparisons when activated.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS7605615B2Voltage comparator circuit
Publication Date: 2009.10.20 RENESAS ELECTRONICS CORP
  • US7605615B2 patent drawing
  • US7605615B2 patent drawing
  • US7605615B2 patent drawing

AI summary

There is provided a voltage comparator circuit with even lower power consumption. It comprises an FET Q1, to the gate of which a signal input terminal IN1 is connected, an FET Q2, to the gate of which a signal input terminal IN2 is connected, a bistable circuit, an AND circuit G, and an FET Q11. A pulse signal φ, which becomes a strobe signal for the comparison, is supplied to the bistable circuit, and when the pulse signal φ is at a low level, the logic values of output terminals OUT1 and OUT2 go to a high level, and the output of the AND circuit G becomes high, turning the FET Q11 on. When the pulse signal φ changes to a high level from a low level, input voltages are compared, one of the output terminals OUT1 or OUT2 changes to a low level, corresponding to the value relationship between the drain currents of the FETs Q1 and Q2, and the output of the AND circuit G goes to a low level, turning the FET Q11 off. The power consumption is reduced because the source currents of the FETs Q1 and Q2 flow only during a short period of time when the operation of comparison is being performed.