Strobed Comparator Circuit with Dual Strobes for Low Offset
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Solution Overview
Problem
Existing strobed comparator circuits face challenges in achieving reduced offset and charge kickback, with prior methods either providing low offset but high charge kickback or vice versa, making it difficult to design appropriate preceding stages.
Innovation Solution
A strobed comparator circuit design that uses two separate strobe signals to control the regenerative latch and differential pair, allowing the differential pair to remain in the linear region during reset and transition to saturation during a pre-charge phase, reducing offset and charge kickback while maintaining zero static power.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If the differential pair transistors transition from off region to saturation region during reset phase, then offset is reduced, but charge kickback increases causing glitches at output nodes
Solution Approach 1:
The patent divides the reset operation into two separate phases controlled by different strobe signals: (1) differential pair reset phase where M40/M41 are turned off to reduce offset, and (2) regenerative latch reset phase where M10/M11 are turned off. This segmentation allows each phase to optimize for its specific function without interfering with the other, thereby reducing charge kickback while maintaining low offset.
Solution Approach 2:
The patent applies preliminary action by pre-charging the differential pair transistors (M40/M41) to the saturation region before the actual comparison phase begins. This pre-positioning in the saturation region ensures that when the transistors are subsequently turned off during reset, they transition more cleanly with reduced charge kickback, as they are already in the optimal operating state.
2Object-generated harmful factors
If the differential pair transistors remain in linear region during reset phase, then charge kickback is reduced, but offset increases due to gain less than one
Solution Approach 1:
The patent segments the reset function between two separate transistor pairs: the differential pair (M40/M41) handles offset reduction by transitioning to off region, while the regenerative latch pair (M10/M11) handles the actual reset operation. This segmentation allows the differential pair to optimize for low offset without being constrained by charge kickback concerns, as the latch pair absorbs the reset function.
3Device complexity
If a single strobe signal controls both differential pair and regenerative latch, then device complexity is reduced, but offset and charge kickback cannot be simultaneously minimized
Solution Approach 1:
The patent applies segmentation by dividing the control function into two independent strobe signals: one dedicated to controlling the differential pair (M40/M41) and another dedicated to controlling the regenerative latch (M10/M11). This segmentation enables independent optimization of each stage's performance characteristics, allowing simultaneous minimization of offset and charge kickback despite increased control signal complexity.
Data Source
AI summary
A system and method is disclosed for providing a strobed comparator with reduced offset and reduced charge kickback. The strobed comparator circuit comprises a differential pair of transistors coupled to a first switch circuit, a regenerative latch circuit, a first strobe signal line coupled to the switch circuit and a second strobe signal line coupled to the regenerative latch circuit. The first and second strobe signal lines provide separate strobe controls. The differential pair of transistors reduces the charge kickback effect by remaining in an “on” state. The differential pair of transistors is enabled when the regenerative latch circuit is in a reset condition and the regenerative latch circuit is enabled when the differential pair of transistors is in a saturation condition.