Strong Ordered DMA Transaction Handling

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Solution Overview

Problem

Existing DMA engines face challenges in maintaining data coherency without stalling unrelated memory transactions, particularly due to Read-After-Write (RAW) and Write-After-Write (WAW) hazards, which can lead to throughput gaps and head-of-line blocking.

Innovation Solution

The implementation of strong ordered (SO) transactions using an available bit in the memory descriptor to mark transactions as SO, allowing the DMA engine to delay SO transactions until all dependent write transactions are complete, while allowing unrelated transactions to proceed, thus maintaining data coherency without impacting throughput.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the DMA engine delays transactions until all dependent write transactions are complete to maintain data coherency, then data coherency is improved, but transaction throughput deteriorates due to head-of-line blocking

Engineering Contradiction:
Improvedata coherencyVSAvoidtransaction throughput
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent segments transactions into two types: strong ordered transactions (SO) that require strict ordering for data coherency, and relaxed ordered transactions that can proceed without waiting for dependent writes. This segmentation allows the system to maintain data coherency for critical transactions while allowing other transactions to proceed in parallel, thus resolving the contradiction between reliability and productivity.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent applies different quality attributes to different transactions. Strong ordered transactions receive strict ordering guarantees (local quality of reliability), while relaxed ordered transactions receive best-effort processing (local quality of productivity). This local differentiation allows the system to optimize each transaction type according to its specific requirements without compromising overall system performance.

Inventive Principle:
Principle #3Local quality

2Reliability

If the DMA engine implements strong ordering for all transactions to ensure data coherency, then data coherency is improved, but device complexity increases due to additional tracking mechanisms

Engineering Contradiction:
Improvedata coherencyVSAvoidtransaction tracking complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

Instead of implementing strong ordering uniformly across all transactions, the system applies strong ordering only locally to transactions that require it (marked with SO indicator). This selective approach reduces the overall complexity of the tracking mechanism while maintaining data coherency where necessary, as the system only needs to track dependencies for a subset of transactions rather than all transactions.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent segments the transaction management logic into two paths: one for strong ordered transactions that requires dependency tracking, and another for relaxed ordered transactions that does not. This segmentation simplifies the overall system architecture by allowing the complexity of tracking mechanisms to be isolated to only the necessary transaction types, rather than requiring comprehensive tracking for all transactions.

Inventive Principle:
Principle #1Segmentation

3Reliability

If the DMA engine stalls all transactions waiting for dependent write completion, then data coherency is improved, but productivity deteriorates due to throughput gaps

Engineering Contradiction:
Improvedata coherencyVSAvoidDMA transfer throughput
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent segments transactions into strong ordered and relaxed ordered categories, allowing the system to stall only the necessary strong ordered transactions while allowing relaxed ordered transactions to proceed uninterrupted. This segmentation prevents unnecessary throughput gaps by enabling parallel processing of independent transactions, thus maintaining overall productivity while ensuring data coherency for critical operations.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces dynamic transaction handling where the DMA engine adapts its behavior based on transaction type. Strong ordered transactions trigger stalling behavior to ensure coherency, while relaxed ordered transactions proceed dynamically without blocking. This dynamic approach optimizes the balance between data coherency and throughput by responding to the specific requirements of each transaction rather than applying a static stall policy to all transactions.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS12204757B1Strong ordered transaction for DMA transfers
Publication Date: 2025.01.21 AMAZON TECH INC
  • US12204757B1 patent drawing
  • US12204757B1 patent drawing
  • US12204757B1 patent drawing

AI summary

A technique for processing strong ordered transactions in a direct memory access engine may include retrieving a memory descriptor to perform a strong ordered transaction, and delaying the strong ordered transaction until pending write transactions associated with previous memory descriptors retrieved prior to the memory descriptor are complete. Subsequent transactions associated with memory descriptors following the memory descriptor are allowed to be issued while waiting for the pending write transactions to complete. Upon completion of the pending write transactions, the strong ordered transaction is performed.