Structural Matching for Fast Electronic Circuit Re-synthesis
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Solution Overview
Problem
Current electronic design workflows for complex circuits, such as Very-Large Scale Integration (VLSI) and Field Programmable Gate Arrays (FPGA), are hindered by lengthy processing times due to the complexity of design changes, which can take hours or even days, especially when minor changes require significant rework in placement and routing.
Innovation Solution
A method is introduced to automatically detect and reuse portions of existing electronic circuit designs by matching components and updating programmable parameters, allowing for the efficient generation of new netlists that reduce the need for full redesign and re-routing, thereby streamlining the design cycle.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If traditional full synthesis and placement routing processes are used for design changes, then design accuracy and completeness are maintained, but processing time increases significantly
Solution Approach 1:
The patent segments the design change process into three distinct phases: structural netlist generation, structural matching to identify reusable components, and selective placement routing. This segmentation allows the system to process only the changed portions rather than performing full synthesis and placement routing on the entire design, thereby maintaining accuracy while significantly reducing processing time for iterative design changes.
Solution Approach 2:
The patent performs preliminary structural matching between the new structural netlist and existing placed and routed netlists before committing to full placement and routing. By identifying reusable components in advance through structural matching, the system prepares a plan that avoids redundant processing, allowing rapid incorporation of design changes while maintaining quality standards.
2Adaptability or versatility
If design changes are made to complex circuits with over 100,000 gates, then design adaptability and improvement are achieved, but the impact propagates to 3-4 times as many gates requiring rework
Solution Approach 1:
The patent applies local quality by treating different portions of the circuit differently based on their relationship to the design change. Components that match existing structures are handled through simple parameter updates, while only non-matching components undergo full placement and routing. This localized approach ensures that design adaptability is maintained while minimizing the propagation of complexity changes through the circuit.
Solution Approach 2:
The patent copies existing placement and routing information for matching components from the old design to the new design, rather than regenerating it. By identifying components with the same structural characteristics and copying their placement and routing data, the system maintains design adaptability while avoiding the exponential propagation of complexity that would occur if all components were reprocessed.
3Reliability
If manual methods are used for detecting and reusing circuit portions, then design control and verification are maintained, but productivity decreases due to 12-14 man-day efforts
Solution Approach 1:
The patent implements self-service by automating the detection of reusable circuit portions through structural matching algorithms that automatically compare netlists and identify corresponding components. The system autonomously determines which components can be reused and which require reprocessing, eliminating the need for manual analysis while maintaining design control through systematic verification of matching criteria.
Solution Approach 2:
The patent utilizes parameter changes as the basis for automated structural matching, comparing component parameters such as type, inputs, and outputs to identify equivalent components. By automating this parameter-based comparison process, the system achieves both high productivity through rapid automated analysis and reliable design control through systematic parameter verification, reducing manual effort from 12-14 man-days to automated processing.
Data Source
AI summary
Techniques include retrieving a first structural netlist (SN1) that indicates electronic components, values of programmable parameters, and connections for a first electronic circuit, and retrieving a first placed and routed netlist (PR1) that indicates physical placement of the electronic components and physical routing of connections for SN1. Also retrieved is a second structural netlist (SN2) for a different second electronic circuit. For each component in SN2, a matching component, if any, is found in SN1 based on type of component and inputs that are output from other matching components. A different second placed and routed netlist (PR2) is generated for the second circuit by deriving new placement and routing for only for non-matching components in SN2.