Structural Overapproximation Coupled with SAT Solver for Verification
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Solution Overview
Problem
Current verification techniques for processor and ASIC designs are resource-intensive, with formal verification requiring exponential computational resources and semi-formal methods offering incomplete coverage as design size increases, lacking effective methods to tightly couple structural overapproximation algorithms with structural satisfiability solvers.
Innovation Solution
A method that involves creating an initial design netlist abstraction, unfolding it by a selectable depth, verifying a composite target using a satisfiability solver, examining counterexamples to identify refinement pairs, and building a new abstraction with learned clauses and invariants, enabling synergistic coupling of overapproximation and satisfiability algorithms to reduce design size and resource consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If formal verification techniques are used to verify processor and ASIC designs, then verification completeness and reliability are improved, but computational resource consumption increases exponentially
Solution Approach 1:
The verification process is segmented into multiple iterative phases: initial overapproximation verification, counterexample analysis, refinement pair identification, and incremental refinement. Each phase processes a portion of the design or a specific aspect, breaking down the exponentially complex problem into manageable polynomial-scale subproblems that are solved iteratively
Solution Approach 2:
The verification system dynamically adapts its approach by switching between overapproximation mode (for quick rejection of incorrect designs) and refinement mode (for detailed verification). The complexity of verification grows polynomially with design size through dynamic refinement rather than statically requiring exponential resources from the outset
2Use of energy by moving object
If semi-formal verification techniques are applied to reduce resource consumption, then computational efficiency is improved, but verification coverage decreases as design size increases
Solution Approach 1:
The system employs feedback loops where counterexamples from overapproximation verification are analyzed to identify refinement pairs, which are then used to incrementally refine the abstraction. This feedback mechanism ensures that verification coverage improves with each iteration while maintaining polynomial computational efficiency, preventing coverage degradation as design size increases
Solution Approach 2:
Overapproximation verification is performed preliminarily before detailed verification. This preliminary action quickly identifies obvious design errors and eliminates unnecessary refinement work, allowing the system to maintain high verification coverage for critical paths while keeping overall computational efficiency polynomial rather than exponential
3Productivity
If overapproximation is used to reduce design size for verification, then verification speed is improved, but verification accuracy decreases due to loss of design details
Solution Approach 1:
The level of abstraction dynamically adjusts through iterative refinement. Initial overapproximation provides coarse-grained verification speed, while subsequent refinements incrementally restore design details only where counterexamples indicate potential errors. This dynamic adjustment maintains verification speed while improving accuracy only where necessary
Solution Approach 2:
Refinement is applied locally to specific regions of the design identified by counterexamples rather than uniformly across the entire design. Refinement pairs target specific state variables and transitions that require higher precision, maintaining verification speed for the majority of the design while improving local accuracy where needed
Data Source
AI summary
A method, system and computer program product for performing verification are disclosed. A first abstraction of an initial design netlist containing a first target is created and designated as a current abstraction, and the current abstraction is unfolded by a selectable depth. A composite target is verified using a satisfiability solver, and in response to determining that the verifying step has hit the composite target, a counterexample to is examined to identify one or more reasons for the first target to be asserted. One or more refinement pairs are built by examining the counterexample, and a second abstraction is built by composing the refinement pairs. One or more learned clauses and one or more invariants to the second abstraction and the second abstraction is chosen as the current abstraction. The current abstraction is verified with the satisfiability solver.