Structured Block Transfer Module for Multi-Core Memory Arbitration
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Solution Overview
Problem
In multi-core systems, efficiently copying data from one processor's private memory to another without significant performance penalties, such as processor idle time or complex coordination, is challenging due to limitations in existing memory arbitration and transfer methods.
Innovation Solution
A Structured Block Transfer Module (SBTM) with a connection manager and copy engines that autonomously identify source and destination memory blocks, manage memory availability, and perform data copying without host direction, enabling flexible and efficient data transfer between private memories.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If shared memory architecture is used to allow multiple processors to access memory, then memory accessibility is improved, but processor idle time increases due to arbitration delays
Solution Approach 1:
The shared memory system is segmented into multiple private memory regions, each assigned to specific processors. This segmentation allows processors to access their assigned memory without arbitration delays while maintaining the ability to share data through controlled transfers between memory regions.
Solution Approach 2:
A dedicated copy engine acts as an intermediary between private memory regions, handling data transfers autonomously without requiring processor intervention. This mediator enables memory sharing functionality while keeping processors idle-free during transfer operations.
2Loss of time
If private memory architecture is used to guarantee predictable access latency, then access latency is improved, but data transfer complexity increases between processors
Solution Approach 1:
The copy engine serves as an intermediary that manages all inter-processor data transfers. It autonomously identifies source and destination memory blocks, manages memory availability, and executes copying operations, thereby reducing transfer complexity from processors while maintaining predictable access latency.
Solution Approach 2:
The copy engine operates autonomously to manage data transfers between private memory regions. It self-identifies transfer requirements, selects appropriate memory blocks, and executes copying without processor intervention, simplifying the transfer mechanism while preserving low access latency.
3Adaptability or versatility
If processor-based copying is used to transfer data between memories, then transfer flexibility is improved, but processor productivity decreases due to copying overhead
Solution Approach 1:
The data copying function is extracted from the processor and assigned to a dedicated copy engine. This separation allows the processor to focus on productive work while the copy engine handles transfer operations autonomously, maintaining transfer flexibility through programmable copy operations without sacrificing processor productivity.
Solution Approach 2:
The copy engine performs self-service by autonomously managing the entire copying process including identifying source and destination blocks, managing memory availability, and executing transfers. This self-contained operation provides flexible data transfer capability without requiring processor involvement, thereby preserving processor productivity.
4Adaptability or versatility
If memory arbitration is implemented to manage shared memory access, then memory sharing is improved, but system complexity increases
Solution Approach 1:
Memory is segmented into private regions with clear ownership assignments to processor groups. This segmentation eliminates the need for complex arbitration logic while maintaining memory sharing capability through controlled transfers managed by the simple copy engine that operates between defined memory boundaries.
Data Source
AI summary
Structured block transfer module, system architecture, and method for transferring content or data. Circuit allowing content in one memory to be shifted, moved, or copied to another memory with no direction from a host, the circuit comprising: a connection manager, at least one copy engine, and a connection between the connection manager and the copy engine. Method for transferring the contents of one of a number of blocks of source memory to one of a number of possible destination memories comprising: selecting source memory; selecting available destination memory; marking the selected destination as no longer available; copying contents of selected source memory into selected destination memory; and marking selected source as available.