Structured LDPC Base Matrix for Incremental Redundancy HARQ
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Solution Overview
Problem
Existing LDPC codecs lack support for incremental redundancy HARQ and have insufficient flexibility, particularly in high-speed communication scenarios, failing to achieve performance comparable to turbo codes and requiring complex hardware implementations.
Innovation Solution
Designing a base matrix structure for LDPC codes that supports multiple code rates and lengths, ensuring girth values for improved decoding performance and flexibility, enabling ultra-high-speed encoding and decoding with support for incremental redundancy HARQ.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If traditional LDPC code structures are used, then encoding and decoding can be performed, but the codec cannot support incremental redundancy HARQ and has insufficient flexibility
Solution Approach 1:
The parity check matrix H is segmented into an information matrix H1 and a parity matrix H2, where H1 corresponds to information bits and H2 corresponds to parity bits. This segmentation enables flexible extraction of different code rates and lengths by selectively using portions of the matrix, thereby supporting incremental redundancy HARQ without requiring complete redesign of the hardware structure.
Solution Approach 2:
A single base matrix structure is designed to serve multiple functions: it can generate different code rates (1/3, 1/2, 2/3, etc.), support different code lengths, and enable incremental redundancy HARQ operations. This universal design eliminates the need for multiple dedicated hardware structures for different coding scenarios.
2Reliability
If LDPC codes are used to approach Shannon limit, then error correction capability is improved, but hardware implementation becomes complex
Solution Approach 1:
The invention changes the structural parameters of the parity check matrix by using a specific base matrix with defined patterns of non-zero elements. This parameter design ensures that the matrix maintains sparsity (for low complexity) while achieving good error correction performance. The base matrix parameters are optimized to balance reliability and hardware complexity.
3Productivity
If code length and rate are increased to meet high-speed communication requirements, then communication performance is improved, but decoding complexity increases
Solution Approach 1:
The base matrix is pre-designed with optimal structures that facilitate efficient encoding and decoding operations. By preparing the matrix structure in advance with proper sparsity patterns and block structures, the decoding complexity is managed before the actual high-speed communication occurs, enabling scalable performance for different code lengths and rates.
Data Source
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AI summary
The present invention provides an encoding method and device and a decoding method and device for structured LDPC. The encoding method includes: determining a base matrix used for encoding and performing an LDPC encoding operation on a source information bit sequence according to the base matrix and an expansion factor Z corresponding to the base matrix to obtain a codeword sequence, where Z is a positive integer. The base matrix includes at least one submatrix and the at least one submatrix includes an upper-left submatrix Hb1 and an upper-left submatrix Hb2, where the upper-left submatrix Hb1 is an upper-left submatrix of the upper-left submatrix Hb2. The technical solutions in the present invention solve the problem in the existing art that an LDPC codec cannot support an incremental redundancy HARQ and has insufficient flexibility.