Structured LDPC Matrix Layout for Lower-Complexity Decoding

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Solution Overview

Problem

Current communication systems face challenges in achieving low bit error rates and symbol error rates at given signal-to-noise ratios, as existing forward error correction and error correction codes are not optimized for specific applications, leading to inefficiencies in data transmission.

Innovation Solution

The implementation of Low Density Parity Check (LDPC) codes using LDPC matrices with specific structures, such as partitioned sub-matrices and cyclic shifted identity sub-matrices, for encoding and decoding signals in communication systems to improve error correction capabilities.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional forward error correction codes are used, then basic error correction is provided, but bit error rates and symbol error rates remain high at given signal-to-noise ratios

Engineering Contradiction:
Improvebit error rateVSAvoidcoding structure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The parity check matrix is segmented into multiple sub-matrices, including cyclic shifted identity sub-matrices and all-zero sub-matrices. This segmentation allows the decoder to process different segments independently and in parallel, improving error correction performance while managing computational complexity through structured organization of the code matrix.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent employs specific parameter configurations including cyclic shift values, sub-matrix dimensions, and parity check matrix density. By optimizing these parameters, the code achieves better error correction performance at given signal-to-noise ratios while controlling the complexity of encoding and decoding operations.

Inventive Principle:
Principle #35Parameter changes

2Adaptability or versatility

If generic error correction codes are used, then broad applicability is achieved, but performance is not optimized for specific applications

Engineering Contradiction:
Improveapplication-specific optimizationVSAvoiddata transmission efficiency
Core Design Contradiction:
Adaptability or versatilityVSProductivity

Solution Approach 1:

Different sub-matrices within the parity check matrix have different structures and properties. Cyclic shifted identity sub-matrices provide certain error correction capabilities while all-zero sub-matrices provide others. This local differentiation allows the code to be optimized for specific application requirements while maintaining overall versatility across different communication scenarios.

Inventive Principle:
Principle #3Local quality

3Reliability

If complex error correction codes are used, then error correction capability is improved, but computational complexity and processing overhead increase

Engineering Contradiction:
Improvesymbol error rateVSAvoiddecoding complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

By segmenting the parity check matrix into structured sub-matrices, the decoding process can be divided into independent stages. Each sub-matrix can be processed separately, reducing the overall computational complexity compared to processing a dense, unstructured matrix of the same size, while still achieving high symbol error rate performance.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent optimizes parameters such as sub-matrix size, cyclic shift values, and matrix density to balance error correction performance with decoding complexity. Proper parameter selection ensures that the code achieves low symbol error rates without requiring excessively complex decoding algorithms or hardware.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS9154261B2Low density parity check (LDPC) coding in communication systems
Publication Date: 2015.10.06 AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE LTD
  • US9154261B2 patent drawing
  • US9154261B2 patent drawing
  • US9154261B2 patent drawing

AI summary

A communication device is configured to encode and/or decode low density parity check (LDPC) coded signals. Such LDPC coded signals are characterized by LDPC matrices having a particular form. An LDPC matrix may be partitioned into a left hand side matrix and the right hand side matrix. The right hand side matrix can be lower triangular such that all of the sub-matrices therein are all-zero-valued sub-matrices (e.g., all of the elements within an all-zero-valued sub-matrix have the value of “0”) except for those sub-matrices located on a main diagonal of the right hand side matrix and another diagonal that is adjacently located to the left of the main diagonal. A device may be configured to employ different LDPC codes having different LDPC matrices for different LDPC coded signals. The different LDPC matrices may be based generally on a common form (e.g., with a right hand side matrix as described above).