Structured Paste Layer for Semiconductor Die Sintering

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Solution Overview

Problem

Existing methods for fabricating semiconductor devices using sintering processes are costly due to high material consumption, equipment inefficiency, and variability in substrate properties, leading to increased production costs and reduced throughput.

Innovation Solution

A method involving applying a paste layer to a substrate comprising multiple semiconductor dies, structuring it, and cutting along predefined regions to create individual dies with a conductive layer, allowing for batch processing, reduced paste consumption, and improved equipment utilization, while minimizing the need for customized stencils and reducing material variability.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a sintering process is used to attach semiconductor dies to substrates, then reliable joints are achieved, but fabrication costs increase significantly

Engineering Contradiction:
Improvejoint reliabilityVSAvoidfabrication cost
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The substrate is divided into multiple individual die carriers, each receiving paste only at the specific location where a semiconductor die will be mounted. This segmentation approach reduces paste consumption while maintaining reliable joints, as paste is applied only where needed rather than covering entire substrate surfaces

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The paste layer is applied and structured before the semiconductor dies are mounted on the substrate. This preliminary structuring allows for precise paste placement and reduces material waste, thereby lowering fabrication costs while ensuring reliable joints are formed when dies are attached

Inventive Principle:
Principle #10Preliminary action

2Reliability

If traditional sintering equipment is used, then proper heating and pressure are applied, but equipment efficiency decreases and throughput is reduced

Engineering Contradiction:
Improvesintered joint qualityVSAvoidthroughput
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

Multiple die carriers are processed simultaneously in a single sintering cycle. The method enables batch processing where several substrates with structured paste layers are heated and pressed together in one operation, significantly increasing equipment utilization and throughput while maintaining proper sintering conditions for reliable joints

Inventive Principle:
Principle #5Merging (Combining)

3Adaptability or versatility

If substrates with varying properties are used, then flexibility in manufacturing is maintained, but process stability decreases and costs increase

Engineering Contradiction:
Improvesubstrate flexibilityVSAvoidprocess stability
Core Design Contradiction:
Adaptability or versatilityVSStability of the object's composition

Solution Approach 1:

The paste layer is structured with different properties in different regions: it has precise geometry and controlled composition at the die mounting locations, while the areas between dies have different characteristics. This local differentiation allows the process to accommodate various substrate properties while maintaining stable and reliable joints at the critical mounting positions

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enhances throughput, reduces material and equipment costs, stabilizes the process, and allows for flexible die placement without the need for extensive stencil customization, resulting in more efficient and cost-effective semiconductor device fabrication.

Implementation Method 1

a paste layer is arranged between the die and the pad and pressure and/or temperature is applied to fabricate a sintered metal layer out of the paste layer

Methodology Applied
Scientific EffectSintering: Sintering

Data Source

PatentUS11329021B2Method for fabricating a semiconductor device comprising a paste layer and semiconductor device
Publication Date: 2022.05.10 INFINEON TECHNOLOGIES AG
  • US11329021B2 patent drawing
  • US11329021B2 patent drawing
  • US11329021B2 patent drawing

AI summary

A semiconductor device and method for fabricating a semiconductor device, comprising a paste layer is disclosed. In one example the method comprises attaching a substrate to a carrier, wherein the substrate comprises a plurality of semiconductor dies. A layer of a paste is applied to the substrate. The layer above cutting regions of the substrate is structured. The substrate is cut along the cutting regions.