Structured Sintered Layer for Power Electronics Stress Relief

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Solution Overview

Problem

Power electronic components face challenges in achieving good electrical and thermal coupling with substrates while minimizing mechanical stresses due to differing thermal expansion coefficients, which can impair the stability and reliability of sintered layers.

Innovation Solution

A structured sintered layer with varying surface coverage density of sintered elements is created, where higher density in the central area ensures effective thermal and electrical conductivity and lower density at the edges increases sintering pressure, reducing mechanical stresses and ensuring redundancy in case of element failure, with through-channels for gas exchange during sintering.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If uniform sintered layer is used across the entire contact surface, then manufacturing simplicity is maintained, but thermal and electrical conductivity is insufficient at edges where mechanical stresses are highest

Engineering Contradiction:
Improvestability of sintered connectionVSAvoidstructure of sintered layer
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The sintered layer is designed with spatially varying properties: higher surface coverage density in the central area for optimal thermal/electrical conductivity, and lower surface coverage density at edge areas for enhanced mechanical stress relief. This local differentiation resolves the contradiction by optimizing each region for its specific functional requirements rather than using a uniform structure throughout.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The contact surface is divided into distinct regions (central area and edge areas) with different sintered element densities. This segmentation allows independent optimization of thermal conductivity in the center and mechanical reliability at the edges, resolving the contradiction between uniform manufacturing and localized performance requirements.

Inventive Principle:
Principle #1Segmentation

2Reliability

If high surface coverage density is used throughout the contact surface, then thermal and electrical conductivity is improved, but mechanical stresses increase at edges leading to reduced reliability

Engineering Contradiction:
Improvethermal and electrical conductivityVSAvoidmechanical stress in sintered layer
Core Design Contradiction:
ReliabilityVSStress or pressure

Solution Approach 1:

Different surface coverage densities are applied to different regions: high density in the central area maximizes thermal and electrical conductivity where temperatures are highest, while low density at edge areas reduces mechanical stresses caused by thermal expansion differences, thereby resolving the contradiction between conductivity and stress relief.

Inventive Principle:
Principle #3Local quality

3Stress or pressure

If low surface coverage density is used at edge areas, then mechanical stress relief is achieved, but thermal and electrical conductivity may be insufficient

Engineering Contradiction:
Improvemechanical stress at edgesVSAvoidthermal and electrical conductivity
Core Design Contradiction:
Stress or pressureVSReliability

Solution Approach 1:

The edge areas are specifically designed with lower sintered element density to relieve mechanical stresses from thermal expansion mismatches, while the central area maintains high density for optimal thermal and electrical conductivity. This local differentiation resolves the contradiction by assigning different functional priorities to different regions.

Inventive Principle:
Principle #3Local quality

4Area of stationary object

If sintered layer extends to chip edges for maximum contact area, then bonding area is maximized, but mechanical stresses on fragile chip edges increase

Engineering Contradiction:
Improvecontact area of sintered layerVSAvoidmechanical strength of chip edges
Core Design Contradiction:
Area of stationary objectVSStrength

Solution Approach 1:

The sintered layer coverage is differentiated between central and edge areas, with reduced density at edges. This allows the contact area to extend near the chip edges while maintaining lower stress concentrations in those vulnerable regions, resolving the contradiction between maximizing bonding area and protecting edge strength.

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enhances the reliability and stability of the sintered connection by maintaining thermal and electrical conductivity while reducing mechanical stresses and ensuring uniform sintering across the contact surface.

Implementation Method 1

In silver sintering, a paste containing silver-based microparticles or nanoparticles is compressed under elevated temperature and pressure, whereby the individual particles aggregate to form a mechanically stable sintered layer

Methodology Applied
Scientific EffectSintering: Sintering

Implementation Method 2

For each sintering element, a through-channel is formed along the main surface of the substrate between the chip and the substrate, ensuring gas supply and degassing for each element during the sintering process

Methodology Applied
Scientific EffectGas transport through channels:

Data Source

PatentEP2729965B1Method for fabricating a semiconductor component with a structured sintered connection layer and semiconductor component with a structured sintered connection layer
Publication Date: 2020.08.05 ROBERT BOSCH GMBH
  • EP2729965B1 patent drawingFigure 1a~1c
  • EP2729965B1 patent drawingFigure 2~3
  • EP2729965B1 patent drawingFigure 4~5

AI summary

The fundamental concept of the invention is to produce a sintering layer connection between a substrate (11) and a chip (13), said connection creating both an excellent electric and thermal bond between the substrate (11) and the chip (13) and also reducing mechanical stress in the chip (13). The invention relates to a method for producing a sintering layer (12), comprising the steps of applying in a structured fashion a plurality of sintering elements (22a, 22b, 22c) composed of a starting material that forms the sintering layer to a contact area (21) of a main surface (11a) of a substrate (11), arranging a chip to be connected to the substrate on the sintering elements (22a, 22b, 22c), and heating and compressing the sintering elements (22a, 22b, 22c) in order to produce a structured sintering layer which connects the substrate and the chip and which extends within the contact area (21), wherein the area occupation density of the sintering elements (22a, 22b, 22c) on the substrate (11) in a central region (21a) of the contact area (21) is greater than the area occupation density of the sintering elements in an edge region (21c) of the contact area (21), and wherein at least one passage channel (23) runs from each of the sintering elements (22a, 22b, 22c) laterally with respect to the main surface of the substrate to the edge of the contact area (21). A large-area sintering element (22a) can be located in the central region (21a) of the contact surface (21) and a plurality of, for example circular, sintering elements (22c) can be located in an edge region (21c) of the contact surface (21). The sintering elements (22a, 22b, 22c) can also have notches (24). The invention also relates to a corresponding device (10, 10', 10").