STT-MRAM Common Source Plate for Cell Density and Current Reduction

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Solution Overview

Problem

Conventional STT-MRAM devices require higher current for read and write operations compared to other non-volatile memory technologies, limiting their ability to achieve high density cell array layouts and efficient data storage.

Innovation Solution

The implementation of a memory cell array structure with a common source plate that extends at angles to data and access lines, allowing for staggered magnetic tunnel junctions and reduced electrical current requirements, enabling the use of higher resistivity materials for source lines and improving cell density to 8F2 size.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If conventional source line configurations are used in STT-MRAM devices, then the device structure is simpler, but the current requirements are higher and cell density is limited

Engineering Contradiction:
Improvecell densityVSAvoidcurrent requirement
Core Design Contradiction:
ProductivityVSUse of energy by moving object

Solution Approach 1:

The common source is configured as a grid-shaped plate extending in two dimensions (first and second directions) rather than a single linear dimension. This two-dimensional extension allows the source to serve multiple memory cells simultaneously in both row and column directions, reducing the number of separate source lines needed and enabling higher cell density while maintaining lower current requirements through shared access paths.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The grid-shaped common source serves multiple functions: it acts as a source for memory cells in the first direction, as a source for memory cells in the second direction, and provides shared access pathways that reduce overall current requirements. This multi-functional configuration allows a single source structure to support multiple cell arrays efficiently.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Reliability

If higher current is applied to meet read/write requirements, then reliable data storage is achieved, but cell density and storage efficiency are limited

Engineering Contradiction:
Improvedata storage reliabilityVSAvoidstorage efficiency
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The memory array is divided into multiple cell arrays with shared access lines and data lines, where each cell array is served by portions of the grid-shaped common source. This segmentation allows current to be distributed efficiently across multiple smaller groups of cells rather than requiring high current for all cells simultaneously, maintaining reliable data storage while improving overall storage efficiency through parallel access capabilities.

Inventive Principle:
Principle #1Segmentation

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration reduces the maximum resistance of the source lines, allowing for lower current application to each memory cell, enhancing data storage capabilities and enabling the use of higher resistivity materials, thus improving the efficiency and density of STT-MRAM devices.

Implementation Method 1

MRAM is a non-volatile computer memory technology based on magnetoresistance

Methodology Applied
Scientific EffectMagnetoresistance: Magnetoresistance

Implementation Method 2

The free region 14, on the other hand, includes a magnetic material that has a magnetic orientation that may be switched, during operation of the cell, between a 'parallel' configuration and an 'anti-parallel' configuration

Methodology Applied
Scientific EffectSpin torque transfer:

Data Source

PatentUS10727271B2Memory device having source contacts located at intersections of linear portions of a common source, electronic systems, and associated methods
Publication Date: 2020.07.28 MICRON TECHNOLOGY INC
  • US10727271B2 patent drawing
  • US10727271B2 patent drawing
  • US10727271B2 patent drawing

AI summary

Memory devices include an array of memory cells including magnetic tunnel junction regions. The array of memory cells includes access lines extending in a first direction and data lines extending in a second direction transverse to the first direction. A common source includes first linear portions and second linear portions extending at an acute angle to each of the first direction and the second direction. Electronic systems include such a memory device operably coupled to a processor, to which at least one input device and at least one output device is operably coupled. Methods of forming such an array of memory cells including a common source.