STT-MRAM Control Circuit Charge Discharge and Floating State
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Solution Overview
Problem
Existing methods for reducing power consumption in spin transfer torque magnetoresistive random access memory (STT-MRAM) by keeping source and bit lines in a floating state are complicated and require excessive wiring, leading to potential data loss and memory element destruction due to charge accumulation.
Innovation Solution
A control circuit that outputs signals to discharge charges in source and bit lines and maintain them in a floating state before writing or reading, using a transistor between the lines that switches based on the word line potential, thereby preventing erroneous writing and destruction of memory elements while minimizing power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If transistors are inserted between all source lines and bit lines to prevent destruction of memory elements, then reliability is improved, but device complexity and wiring resources increase
Solution Approach 1:
The patent divides the protection function into two parts: a single discharge transistor that handles charge discharge, and the inherent transistor in the memory cell that handles the floating state control. This segmentation avoids the need for multiple protection transistors while maintaining reliability.
Solution Approach 2:
The discharge transistor serves multiple functions: it discharges accumulated charges from both the source line and bit line, and it works in conjunction with the memory cell transistor to maintain the floating state during standby. This multi-functionality reduces the total number of transistors needed.
2Reliability
If transistors are inserted between all source lines and bit lines to prevent destruction of memory elements, then reliability is improved, but wiring resources increase
Solution Approach 1:
The protection function is segmented between the discharge transistor and the memory cell transistor, eliminating the need for additional dedicated protection wiring for each memory cell. This reduces wiring resources while maintaining reliability.
3Use of energy by moving object
If source line and bit line are kept in floating state during standby to reduce power consumption, then power consumption is reduced, but charges accumulate causing potential data loss or memory element destruction
Solution Approach 1:
The discharge transistor is activated before the memory cell transistor to pre-discharge accumulated charges from the source line and bit line. This preliminary action prevents charge accumulation that could lead to data loss or memory element destruction while maintaining the floating state for power savings.
Solution Approach 2:
The control circuit monitors the state of the source line and bit line, and activates the discharge transistor when charge accumulation is detected. This feedback mechanism ensures that charges are discharged only when necessary, maintaining the floating state for power savings while preventing harmful charge accumulation.
Data Source
AI summary
To provide a control circuit capable of not only suppressing an increase in power consumption with a simple configuration but also preventing erroneous writing and destruction of a memory element.Provided is a control circuit that outputs a signal for discharging charges accumulated in a source line and a bit line according to activation of a word line, and outputs a signal for making the source line and the bit line be in a floating state by a start of writing or reading, with respect to a memory cell including the source line, the bit line, a transistor that is provided between the source line and the bit line, and switches on and off by a potential of the word line, and a memory element connected to the transistor in series.