STT-MRAM Local Current Sink Circuit for Parasitic Resistance Reduction

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Solution Overview

Problem

Memory devices, such as MRAM, face increased current and power requirements due to parasitic resistance during write operations, which is undesirable for portable and efficient computing.

Innovation Solution

A Spin Torque Transfer MRAM (STT-MRAM) with a current sink circuit that provides a bit line discharge path to a local ground, reducing parasitic resistance and source loading effects by shortening the write current path during data write operations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of energy

If a conventional write operation is performed without a local current sink, then the write operation can proceed using standard circuit paths, but parasitic resistance increases and source loading effects worsen

Engineering Contradiction:
Improvepower consumptionVSAvoidcircuit structure
Core Design Contradiction:
Loss of energyVSDevice complexity

Solution Approach 1:

The patent divides the write operation current path into two separate discharge paths: one through the write driver and another through the current sink circuit. This segmentation allows the bit line to discharge current locally to ground via the current sink, reducing the current burden on the source line and minimizing parasitic resistance effects without requiring complete circuit redesign

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The current sink circuit acts as an intermediary component between the bit line and ground. It provides a local discharge path that mediates the current flow, reducing source loading effects by diverting excess current away from the source line while maintaining proper write operation functionality

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If the bit line discharge path is extended to remote ground, then grounding is achieved, but parasitic resistance increases due to longer current paths

Engineering Contradiction:
Improvewrite operation reliabilityVSAvoidparasitic resistance
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent implements a local current sink circuit positioned near the memory cell array, providing a local discharge path for the bit line. This local grounding approach reduces the length of current paths and minimizes parasitic resistance compared to remote grounding, while maintaining adequate grounding functionality for reliable write operations

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The current sink circuit reduces parasitic resistance and source loading effects, leading to lower power consumption and reduced heat buildup during write operations, enhancing the efficiency of memory devices.

Implementation Method 1

a current sink circuit that provides a bit line discharge path to a local ground

Methodology Applied
Scientific EffectElectrical Conduction: Conduction (electrical)

Implementation Method 2

at least one Magnetic Tunnel Junction (MTJ) coupled to a bit line and coupled to a source line

Methodology Applied
Scientific EffectMagnetic Tunneling: Magnetoresistance

Implementation Method 3

Spin Torque Transfer MRAM (STT-MRAM)

Methodology Applied
Scientific EffectSpin Transfer Torque: Lorentz Force

Data Source

PatentUS9196341B2Memory device having a local current sink
Publication Date: 2015.11.24 QUALCOMM INC
  • US9196341B2 patent drawing
  • US9196341B2 patent drawing
  • US9196341B2 patent drawing

AI summary

A memory device having a local current sink is disclosed. In a particular embodiment, an electronic device is disclosed. The electronic device includes one or more write drivers. The electronic device includes at least one Magnetic Tunnel Junction (MTJ) coupled to a bit line and coupled to a source line. The electronic device also includes a current sink circuit comprising a single transistor, the single transistor coupled to the bit line and to the source line.