STT-MRAM Multi-Level Cell Segmentation and Hierarchical Writing

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Solution Overview

Problem

Conventional STT-MRAM devices can only store 1 bit of data per cell due to the limited number of stable resistance states in a single MTJ memory element, making them less efficient compared to other memory devices capable of storing multiple bits per cell.

Innovation Solution

A method for detecting and writing multi-level cells (MLCs) by sequentially switching memory elements through distinct switching input thresholds, allowing each element to switch between two electrical states without perturbing others, and using a hierarchical writing scheme to identify and restore original resistance states.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If a single MTJ memory element is used per cell, then the device structure remains simple, but the data storage capacity is limited to 1 bit per cell

Engineering Contradiction:

Improvedevice structureVSAvoiddata storage capacity

Core Design Contradiction:

Device complexityVSQuantity of substance

Solution Approach 1:

The memory cell is segmented into multiple MTJ memory elements (first, second, third, and fourth MTJ elements) coupled in series, where each element can independently store one bit of data. This segmentation allows the cell to store multiple bits (e.g., 2 bits or more) while maintaining a relatively simple series circuit structure, resolving the contradiction between structural simplicity and storage capacity.

Inventive Principle:

Principle #1Segmentation

2Quantity of substance

If multiple memory elements are coupled in series to increase storage capacity, then data storage efficiency improves, but resistance changes in one element may perturb others

Engineering Contradiction:

Improvedata storage efficiencyVSAvoidresistance state stability

Core Design Contradiction:

Quantity of substanceVSReliability

Solution Approach 1:

Each MTJ memory element is designed with different resistance characteristics or switching thresholds, creating local quality differences. For example, the first and second MTJ elements may have different resistance ratios compared to the third and fourth elements. This allows selective addressing and switching of individual elements without affecting others, ensuring reliable resistance state stability while maintaining high data storage efficiency.

Inventive Principle:

Principle #3Local quality

3Quantity of substance

If memory elements have different resistance states, then multiple bits can be stored per cell, but interference between elements with different switching thresholds occurs

Engineering Contradiction:

Improvebits per cellVSAvoidinterference between elements

Core Design Contradiction:

Quantity of substanceVSObject-affected harmful factors

Solution Approach 1:

The MTJ memory elements are designed with asymmetric resistance characteristics, where the first and second elements have different resistance ratios than the third and fourth elements. This asymmetry in resistance values and switching thresholds enables differential signaling schemes that can distinguish between different data states while minimizing interference between elements, allowing multiple bits to be stored reliably per cell.

Inventive Principle:

Principle #4Asymmetry

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

Enables the storage of multiple bits per cell by isolating resistance changes to individual elements and preventing interference between memory cells with different switching thresholds, enhancing data storage efficiency in STT-MRAM devices.

Implementation Method 1

When the magnetization directions of the magnetic free and reference layers are substantially parallel, electrons polarized by the magnetic reference layer can tunnel through the insulating tunnel junction layer, thereby decreasing the electrical resistivity of the MTJ. Conversely, the electrical resistivity of the MTJ is high when the magnetization directions of the magnetic reference and free layers are substantially anti-parallel.

Methodology Applied

Scientific EffectMagnetoresistance: Magnetoresistance

Implementation Method 2

Methodology Applied

Scientific EffectElectron tunneling:

Implementation Method 3

Spin transfer torque magnetic random access memory (STT-MRAM) is a new class of non-volatile memory... Upon application of an appropriate current to the magnetic memory element, the electrical resistance of the magnetic memory element would change accordingly, thereby switching the stored logic in the respective memory cell.

Methodology Applied

Scientific EffectSpin transfer torque:

Data Source

PatentUS9105343B2Multi-level cells and method for using the same

Publication Date: 2015.08.11 AVALANCHE TECHNOLOGY INC

AI summary

The present invention is directed to a method for reading and writing an STT-MRAM multi-level cell (MLC), which includes a plurality of memory elements coupled in series. The method detects the resistance states of individual memory elements in an MLC by sequentially writing at least one of the plurality of memory element to the low resistance state in order of ascending write current threshold. If a written element switches the resistance state thereof after the write step, then the written element was in the high resistance state prior to the write step. Otherwise, the written element was in the low resistance state prior to the write step. The switching of the resistance state can be ascertained by comparing the resistance or voltage values of the plurality of memory elements before and after writing each of the plurality of memory elements in accordance with the embodiments of the present invention.