STT-MRAM Source Loading Reduction via Offset Magnetic Field

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Solution Overview

Problem

The 1T1MTJ architecture in MRAMs faces challenges in achieving stable operation due to the source loading effect, particularly when scaling down NMOS technology, which affects the design and performance of spin torque transfer magnetoresistive random access memory (STT-MRAM) cells.

Innovation Solution

The method involves determining a switching current ratio for a magnetic tunnel junction (MTJ) structure and modifying the offset magnetic field by adjusting the physical dimensions of the pinned layer, such as its thickness, to reduce the source loading effect and ensure stable operation of the memory cell.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Area of stationary object

If NMOS technology is scaled down to deep submicron regime, then area and density benefits are achieved, but stable operation becomes difficult due to source loading effect

Engineering Contradiction:

Improvememory cell areaVSAvoidstable operation

Core Design Contradiction:

Area of stationary objectVSReliability

Solution Approach 1:

The patent modifies the offset magnetic field parameter in the MTJ structure by adjusting the pinned layer thickness, which changes the switching current characteristics to compensate for the source loading effect in scaled-down transistors, enabling stable operation in deep submicron regime

Inventive Principle:

Principle #35Parameter changes

2Reliability

If pinned layer thickness is adjusted to modify offset magnetic field, then switching current ratio is optimized for stable operation, but manufacturing complexity increases

Engineering Contradiction:

Improvestable operationVSAvoidmanufacturing process

Core Design Contradiction:

ReliabilityVSEase of manufacture

Solution Approach 1:

The patent specifies adjusting the pinned layer thickness to a range of 3-7 nm to achieve the desired offset magnetic field modification, providing a manufacturable parameter range that balances performance optimization with fabrication feasibility

Inventive Principle:

Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enables stable switching between states in STT-MRAM cells by adjusting device parameters to operate within specific transistor current-voltage characteristics, reducing the source loading effect and improving memory cell performance.

Implementation Method 1

The offset magnetic field may result from magnetostatic couplings between the free layer and its adjacent layers in the MTJ structure

Methodology Applied

Scientific EffectMagnetostatic coupling: Magnetic Field

Implementation Method 2

resistance-based memory technologies, such as Magnetoresistive Random Access Memory (MRAM)

Methodology Applied

Scientific EffectMagnetoresistance: Magnetoresistance

Data Source

PatentEP2404298B1Reducing source loading effect in spin torque transfer magnetoresistive random access memory (STT-MRAM)

Publication Date: 2016.08.31 QUALCOMM INC

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AI summary

Systems and methods to reduce source loading effects in STT-MRAM are disclosed. In a particular embodiment, a method includes determining a switching current ratio of a magnetic tunnel junction (MTJ) structure that enables stable operation of a memory cell. The memory cell includes the MTJ structure serially coupled to an access transistor. The method also includes modifying an offset magnetic field that is incident to a free layer of the MTJ structure. The modified offset magnetic field causes the MTJ structure to exhibit the switching current ratio.