STT-MRAM Fabrication with Conformal Barrier Etch Stop
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Solution Overview
Problem
Existing STT-MRAM structures face issues with over-etching through thin insulating or barrier layers during patterning, leading to magnetic dead layers and device malfunction due to unintended etching of the pinned layer, which affects scalability and reliability.
Innovation Solution
A method involving the formation of a conformal barrier layer along the sidewalls and over the upper surface of the fixed layer, with the hardmask layer serving as an etch stop, preventing over-etching and reducing the risk of by-products formation, and allowing for the deposition of a free layer without relying on the barrier layer as an etch stop.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If a thin insulating or barrier layer (1-3 nm) is used during patterning, then manufacturing precision is improved, but over-etching occurs leading to magnetic dead layers and device malfunction
Solution Approach 1:
A conformal capping layer is deposited over the thin insulating or barrier layer to serve as an intermediary protective layer during etching. This capping layer prevents direct exposure and over-etching of the underlying thin insulating/barrier layer, thereby preventing magnetic dead layer formation while allowing the thin layer to maintain its patterning precision function.
Solution Approach 2:
The conformal capping layer is deposited in advance before the etching process to pre-protect the thin insulating or barrier layer. This preliminary protective action ensures that the thin layer is shielded from over-etching during subsequent patterning operations, preventing device malfunction before it can occur.
2Manufacturing precision
If the barrier layer is used as an etch stop layer, then manufacturing precision is improved, but over-etching still occurs causing magnetic dead layers
Solution Approach 1:
The conformal capping layer acts as an additional intermediary layer between the etch process and the barrier layer. Even when the barrier layer serves as an etch stop, the capping layer provides an extra protective barrier that prevents etch plasma from reaching and damaging the underlying magnetic layers, eliminating magnetic dead layer formation.
Solution Approach 2:
The conformal capping layer provides beforehand cushioning protection to the barrier layer and underlying structures. This protective cushioning layer absorbs the harsh etching conditions, preventing direct damage to the barrier layer and ensuring that the etch stop function is achieved without causing magnetic dead layers.
3Speed
If programming current is increased to switch magnetic layers, then write operation speed is improved, but write disturbances and half-select problems occur in adjacent cells
Solution Approach 1:
The patent employs local quality by creating synthetic antiferromagnetic layers with specific magnetic properties at localized positions. These layers generate localized exchange bias fields that confine the switching action to specific memory cells, enabling fast write operations with high programming current while preventing write disturbances in adjacent cells through localized magnetic field control.
Solution Approach 2:
The patent changes magnetic parameters by introducing synthetic antiferromagnetic layers with tailored exchange coupling strengths and anisotropy fields. These parameter changes enable precise control over the switching current density and magnetic field distribution, allowing fast write operations while minimizing half-select problems through optimized magnetic parameter design.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the reliability and scalability of STT-MRAM structures by preventing unwanted etching and by-product formation, ensuring robust and functional devices while integrating seamlessly into existing semiconductor fabrication processes.
Implementation Method 1
The pinned layer polarizes the electron spin of the programming current, and torque is created as the spin-polarized current passes through the stack. The spin-polarized electron current interacts with the free layer by exerting a torque on the free layer. When the torque of the spin-polarized electron current passing through the stack is greater than the critical switching current density (JC), the torque exerted by the spin-polarized electron current is sufficient to switch the magnetization of the free layer.
Implementation Method 2
MRAM data is stored by magnetoresistive elements. Generally, the magnetoresistive elements are made from two magnetic layers, each of which holds a magnetization. The magnetization of one layer (the 'pinned layer') is fixed in its magnetic orientation, and the magnetization of the other layer (the 'free layer') can be changed by an external magnetic field generated by a programming current. Thus, the magnetic field of the programming current can cause the magnetic orientations of the two magnetic layers to be either parallel, giving a lower electrical resistance across the layers ('0' state), or antiparallel, giving a higher electrical resistance across the layers ('1' state).
Data Source
AI summary
A method for fabricating an STT-MRAM integrated circuit includes forming a fixed layer over a bottom electrode layer, forming a silicon oxide layer a hardmask layer over the fixed, and forming a trench within the silicon oxide and hardmask layers, thereby exposing an upper surface of the fixed layer and sidewalls of the silicon oxide and hardmask layer. The method further includes forming a conformal barrier layer along the sidewalls of the silicon oxide and hardmask layers and over the upper surface of the fixed layer, such that the conformal barrier layer comprises sidewall portions adjacent the sidewalls of the silicon oxide and hardmask layers and a central portion in between the sidewall portions and adjacent the upper surface of the fixed layer. The method further includes forming a free layer between the sidewall portions of the barrier layer and over the central portion of the barrier layer.