STTMRAM Seed Layer Superlattice for CMOS Compatibility

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Solution Overview

Problem

Current spin transfer torque magnetic random access memory (STTMRAM) devices face challenges in scalability, thermal stability, and compatibility with CMOS process technology due to high Gilbert damping constants and integration difficulties of certain material stacks, particularly Co/Pd or Pt multilayers, which limit their implementation in real MTJ cells.

Innovation Solution

A magnetic memory device with a seed layer comprising alternating monolayers of Ni and Cr forming a superlattice structure, a metal underlayer of Hf, Ta, or Ti, and a multilayered reference stack with alternating Co and Ni layers, along with a polarizer layer of CoFeB, enhances perpendicular magnetic anisotropy and thermal stability, making it compatible with back-end-of-line (BEOL) processes and capable of withstanding high annealing temperatures.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Stability of the object's composition

If Co/Pd or Pt multilayer stacks are used to increase reference layer stability, then thermal stability is improved, but Gilbert damping constant increases and CMOS compatibility deteriorates

Engineering Contradiction:
Improvereference layer stabilityVSAvoidGilbert damping constant
Core Design Contradiction:
Stability of the object's compositionVSReliability

Solution Approach 1:

The patent changes the material composition parameters of the seed layer by replacing Co/Pd or Pt multilayers with CoFeB materials, adjusting the magnetic and damping properties to achieve both thermal stability and low Gilbert damping constant compatible with CMOS processes

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent uses composite material structures including CoFeB reference layer combined with specific underlayer and capping layer materials to achieve the desired balance between stability, low damping, and CMOS compatibility

Inventive Principle:
Principle #40Composite materials

2Stability of the object's composition

If Co/Pd or Pt multilayer stacks are used to increase reference layer stability, then thermal stability is improved, but integration difficulty increases

Engineering Contradiction:
Improvereference layer stabilityVSAvoidCMOS compatibility
Core Design Contradiction:
Stability of the object's compositionVSEase of manufacture

Solution Approach 1:

The patent changes the material parameters by substituting Pd or Pt with CoFeB-based materials that have similar or superior magnetic properties but are compatible with standard CMOS fabrication processes, particularly etching and annealing steps

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent adopts materials that are more readily available and easier to process in standard semiconductor manufacturing, replacing rare or difficult-to-process materials like Pd and Pt with more CMOS-friendly alternatives

Inventive Principle:
Principle #27Cheap short-living objects (Disposable)

3Quantity of substance

If MTJ cell size is reduced to increase density, then storage density is improved, but thermal stability deteriorates

Engineering Contradiction:
Improvestorage densityVSAvoidthermal stability
Core Design Contradiction:
Quantity of substanceVSStability of the object's composition

Solution Approach 1:

The patent employs composite material structures with perpendicular magnetic anisotropy in the CoFeB reference layer to enhance thermal stability at reduced dimensions, allowing high-density storage while maintaining adequate thermal stability margins

Inventive Principle:
Principle #40Composite materials

Solution Approach 2:

The patent changes the magnetic anisotropy parameters by utilizing perpendicular magnetization orientation and optimizing layer thicknesses to maintain thermal stability as the cell size is scaled down for higher density

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution achieves strong perpendicular magnetic anisotropy, increased thermal stability, high tunnel magnetoresistance signals, and reduced MTJ stack height, enabling data retention for at least 10 years and easier device fabrication while maintaining compatibility with CMOS processes.

Implementation Method 1

the Gilbert damping constant in the Pd or Pt in Co-based multilayer stack was high. This was due to a strong spin-orbit coupling between Pd and Pt with Co in such multilayers stack

Methodology Applied
Scientific EffectSpin-orbit coupling:

Implementation Method 2

spin-torque transfer based MRAMs (STTMRAMs)

Methodology Applied
Scientific EffectSpin transfer torque:

Implementation Method 3

high tunnel magnetoresistance (TMR) signal

Methodology Applied
Scientific EffectTunnel magnetoresistance: Magnetoresistance

Data Source

PatentUS9281468B2Magnetic memory element
Publication Date: 2016.03.08 INTERUNIVERSITAIR MICRO ELECTRONICS CENT (IMEC VZW)
  • US9281468B2 patent drawing
  • US9281468B2 patent drawing
  • US9281468B2 patent drawing

AI summary

The disclosed technology generally relates to semiconductor devices, and more particularly spin transfer torque magnetic random access memory (STTMRAM) elements having perpendicular magnetic anisotropy (PMA). In one aspect, a magnetic element comprises a metal underlayer and a seed layer on the underlayer, the seed layer comprising alternating layers of a first metal and a second metal. The alternating layers of a first metal and a second metal are repeated n times with, 2<=n<=20. Also a spin transfer torque magnetic random access memory element is disclosed having a perpendicular magnetic orientation comprising a metal underlayer on a substrate, a seed layer on the metal underlayer; the seed layer comprising alternating layers of a first metal and a second metal, a magnetic tunnel junction (MTJ) element with a perpendicular orientation including: a reference layer formed on the seed layer, a tunnel barrier layer formed on the reference layer, a storage layer formed on the tunnel barrier layer and a top electrode and a bottom electrode.