SU-8 Thin-Film Package Cooling via Exposed MoCu Heat Spreader
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Solution Overview
Problem
The increasing heat flux density in RF system packaging due to high integration density poses a threat to electrical performance and system reliability, necessitating effective heat dissipation solutions in silicon-based SU-8 thin film packaging.
Innovation Solution
A heat dissipation optimization method is implemented using SU-8 photoresist as the packaging medium, combining a molybdenum copper sheet on the back side of embedded chips, with wiring on the silicon substrate, and a silicon wafer thinning process to enhance heat dissipation through direct contact with a heat sink.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If chip stacking is used to achieve high integration density, then the integration degree is improved, but electromagnetic shielding between chips deteriorates
Solution Approach 1:
The package structure is segmented into multiple functional layers: the silicon substrate provides mechanical support and grounding, the SU-8 photoresist layer acts as an electromagnetic shielding barrier, and the chip is embedded within this structured environment. This segmentation allows each layer to perform its specific function while collectively achieving both high integration and electromagnetic shielding.
Solution Approach 2:
The SU-8 photoresist serves as an intermediary material between the chip and the external environment. It provides electromagnetic shielding while allowing the chip to be embedded in a compact configuration. This intermediary layer enables the system to achieve high integration density without compromising electromagnetic compatibility.
2Temperature
If heat dissipation structures are added to improve heat dissipation, then heat dissipation performance is improved, but device complexity increases
Solution Approach 1:
The silicon substrate performs multiple functions simultaneously: it provides mechanical support for the package structure, serves as a grounding plane for electrical connections, and acts as a heat dissipation pathway through its inherent thermal conductivity. By making the substrate multi-functional, the design achieves effective heat dissipation without adding separate complex heat dissipation structures.
Solution Approach 2:
The system utilizes the inherent thermal conductivity of the silicon substrate and the thermal interface material to dissipate heat passively. The heat generated by the embedded chip naturally conducts through the thermal interface material and silicon substrate to the package exterior, eliminating the need for active cooling mechanisms or complex heat dissipation structures.
3Temperature
If the silicon substrate is thinned to expose the molybdenum copper sheet, then heat dissipation efficiency is improved, but manufacturing precision requirements increase
Solution Approach 1:
The molybdenum copper sheet is pre-installed on the back side of the chip before embedding, and the silicon substrate is pre-thinned to the required thickness. This preliminary preparation ensures that when the chip is embedded and the substrate is thinned further, the heat dissipation pathway is already optimized and the final thinning process only requires removing a controlled amount of material, reducing the overall precision requirement.
Solution Approach 2:
The substrate thickness is changed from a thicker initial state to a thinner final state through controlled thinning processes. By optimizing the thinning parameters (such as etching depth, grinding pressure, and polishing duration), the process achieves the required thickness with acceptable precision tolerances, enabling effective heat dissipation while maintaining manufacturability.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The method improves heat dissipation efficiency, reducing temperature rise and ensuring stable chip operation by quickly transferring heat from chips to a heat sink, thereby enhancing system reliability.
Implementation Method 1
a molybdenum copper sheet is arranged on the back side of the embedded chip... directly contacts the heat sink to achieve heat dissipation optimization
Implementation Method 2
The silicon wafer thinning process on the back side exposes the molybdenum copper sheet from the surface of the silicon substrate
Implementation Method 3
Under the action of ultraviolet light, the double bond in the photoresist molecule is opened, the molecular chains are cross-linked with each other to form a stable and insoluble cross-linked structure
Data Source
AI summary
A heat dissipation optimization method for silicon-based SU-8 thin film packaging, a molybdenum copper sheet is arranged on the back of the embedded chip, and the chip wiring and interconnection is realized on the front side of the silicon substrate through the metal pattern on the SU-8 photoresist, the silicon wafer thinning process on the back side exposes the molybdenum copper sheet from the surface of the silicon substrate and directly contacts the heat sink to achieve heat dissipation optimization; SU-8 photoresist as the packaging medium, and carries out the MEMS process in combination with the silicon substrate, so as to realize abundant three-dimensional structures and fulfill the requirements of high integration and miniaturization of packaging.