Sub-40 nm Pattern Structure Using Spacer Lithography
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Solution Overview
Problem
The challenge lies in forming very fine patterns with critical dimensions less than 40 nm in semiconductor device manufacturing due to resolution limitations of the photolithography process.
Innovation Solution
A pattern structure and method involving the formation of first and second patterns with trenches, where the second pattern is coplanar with the first pattern, and a third pattern with a larger width, using a single photolithography process, including the creation of sacrificial patterns and spacers to achieve the desired pattern configuration.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional photolithography process is used, then manufacturing process is simple, but pattern resolution cannot achieve less than 40 nm critical dimension
Solution Approach 1:
The patent applies segmentation by dividing the pattern formation into multiple stages: first forming sacrificial patterns, then creating spacers on their sidewalls, and finally using these spacers as masks for etching the final fine patterns. This multi-stage approach enables sub-40 nm resolution by breaking down the single photolithography step into sequential processes that achieve finer feature sizes.
Solution Approach 2:
The patent uses sacrificial patterns as intermediary elements that are temporarily formed, have spacers deposited on their sidewalls, and then selectively removed. These sacrificial patterns serve as mediators that enable the formation of the final fine patterns with critical dimensions below 40 nm, which cannot be directly achieved through conventional photolithography alone.
2Manufacturing precision
If multiple photolithography processes are used to achieve fine patterns, then pattern resolution improves, but manufacturing time and complexity increase
Solution Approach 1:
The patent merges multiple patterning operations into a unified process flow. By combining the formation of sacrificial patterns, spacer deposition, selective removal, and final pattern etching into a single integrated sequence, the method achieves fine pattern resolution without requiring multiple separate photolithography cycles, thereby reducing total manufacturing time.
Solution Approach 2:
The patent employs preliminary action by pre-forming sacrificial patterns and depositing spacers on their sidewalls before the final pattern etching. This preliminary preparation enables the subsequent etching step to directly produce the desired fine patterns with sub-40 nm dimensions, eliminating the need for additional photolithography steps and reducing overall process time.
3Productivity
If single photolithography process is used, then manufacturing time is reduced, but pattern resolution cannot achieve less than 40 nm
Solution Approach 1:
The patent introduces dynamics by using spacer deposition on sacrificial pattern sidewalls, where the spacer thickness dynamically determines the final pattern dimensions. This dynamic control mechanism allows precise adjustment of critical dimensions below 40 nm while maintaining a single photolithography process, thereby achieving both high productivity and fine pattern resolution.
Solution Approach 2:
The patent applies parameter changes by controlling the thickness of deposited spacers and the dimensions of sacrificial patterns to achieve sub-40 nm critical dimensions. By varying these physical parameters in the spacer formation and etching processes, the method enables fine pattern resolution while maintaining manufacturing efficiency through a single photolithography step.
Data Source
AI summary
A pattern structure for a semiconductor device includes a plurality of first patterns, each of the first patterns extending in a first direction in the shape of a line, neighboring first patterns being spaced apart from each other by a gap distance, the plurality of first patterns including a plurality of trenches in parallel with the line shapes, respective trenches being between neighboring first patterns, the plurality of trenches including long trenches and short trenches alternately arranged in a second direction substantially perpendicular to the first direction, and at least a second pattern, the second pattern being coplanar with the first pattern, end portions of the first patterns being connected to the second pattern.