Sub-ADC Reference Distribution for Low-Noise Time-Interleaved Conversion
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Solution Overview
Problem
Noise on reference signals in semiconductor integrated circuitry, particularly in sub-ADC units of ADC circuitry, adversely affects the performance of analogue-to-digital converters by degrading converter resolution and overall ADC performance.
Innovation Solution
Implementing techniques such as local reference nodes, balanced switches, and filtering to reduce noise interference between sub-ADC units, using distributed but shared reference sources, and employing multiple reference signals with different noise tolerance levels to improve noise performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If current is drawn over reference signals from a global reference source, then all operating units can share a common reference, but IR drops increase and noise performance deteriorates
Solution Approach 1:
The patent segments the reference signal distribution into hierarchical levels: global reference nodes provide coarse distribution while local reference nodes provide fine-grained distribution to individual operating units. This segmentation reduces the distance current must travel over reference signals, minimizing IR drops and noise coupling between units while maintaining reference signal sharing capabilities.
Solution Approach 2:
The patent introduces a spatial dimension to reference signal distribution by creating a hierarchical structure with global and local nodes. Instead of a flat single-level distribution, the system adds a vertical hierarchy where local reference nodes are positioned closer to operating units in the circuit layout, reducing current path length and interference.
2Productivity
If multiple sub-ADC units operate in time-interleaved manner, then conversion rate increases, but noise interference between units worsens
Solution Approach 1:
The patent segments the reference signal distribution specifically for time-interleaved sub-ADC units by providing dedicated local reference nodes to each unit. This segmentation isolates the reference signals for each sub-ADC unit, preventing noise coupling between units operating in time-interleaved fashion while maintaining high conversion rates.
Solution Approach 2:
The patent applies local quality by providing customized reference signal distribution to each sub-ADC unit based on its specific location and operational characteristics. Local reference nodes are positioned and configured to match the specific needs of each time-interleaved unit, optimizing noise performance for each unit while maintaining overall system productivity.
3Object-affected harmful factors
If local reference nodes are implemented for each operating unit, then noise performance improves, but device complexity increases
Solution Approach 1:
The patent merges the reference signal distribution function into the existing operating unit structures by integrating local reference nodes within or adjacent to each operating unit. This merging approach provides local reference signaling benefits while minimizing additional complexity by combining functions rather than adding separate independent systems.
Solution Approach 2:
The patent creates a universal hierarchical reference distribution structure that serves multiple functions: global reference nodes provide system-wide reference distribution, local reference nodes provide unit-specific reference distribution, and the same structure supports both single-unit and time-interleaved multi-unit operations. This multi-functionality reduces overall device complexity despite the added local nodes.
Data Source
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AI summary
The present invention relates to semiconductor integrated circuitry, and in particular to such circuitry where one or a plurality of similar or identical operating units are each operable to carry out an operation dependent on a reference signal. One example of such an operating unit is a sub-ADC unit of analogue-to-digital converter (ADC) circuitry, which employs one or more such sub-ADC units to convert samples of an input analogue signal into representative digital values. Where there are a plurality of sub-ADC units, they may each convert samples of an input analogue signal into representative digital values. They may also operate in a time-interleaved manner so that their conversion rate (from sample to digital value) can be lower than the overall sample rate by a factor of the number of sub-ADC units.