Sub-beam Forming Receiver Circuitry for Ultrasound Systems
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Solution Overview
Problem
Conventional ultrasound systems face increasing power consumption and complexity due to digital domain beam forming, particularly in portable devices and systems with complex transducer arrays, which necessitates a reduction in power consumption and signal connections between the processor/controller and analog front end.
Innovation Solution
The implementation of multi-channel receiver circuitry for sub-beam forming, which includes input signal delay, signal selection, output signal delay, and signal combining circuitry, performing digital filtering and down-sampling to impose programmable time delays and reduce power consumption by shifting beam forming from the digital to analog and mixed signal domains.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If digital domain beam forming is implemented to achieve desired flexibility and programmability, then beam forming capability is improved, but power consumption increases
Solution Approach 1:
The patent divides the beam forming process into two segments: sub-beam forming performed in the analog domain by the AFE circuitry, and remaining beam forming performed in the digital domain by the processor. This segmentation allows the power-intensive digital processing to be reduced while maintaining overall beam forming capability and flexibility.
Solution Approach 2:
The patent introduces an intermediary sub-beam forming stage in the analog domain that processes signals before they are transmitted to the processor. This intermediary stage reduces the complexity and power consumption of the subsequent digital beam forming while preserving the desired adaptability through programmable control.
2Adaptability or versatility
If digital domain beam forming is implemented to achieve desired flexibility and programmability, then beam forming capability is improved, but the number of signal connections increases
Solution Approach 1:
The patent segments the beam forming functionality between the AFE and processor, with the AFE performing sub-beam forming on multiple channels and consolidating them before transmission to the processor. This reduces the number of signal connections required between the AFE and processor while maintaining the flexibility of digital beam forming.
Solution Approach 2:
The patent combines multiple sub-beam formed signals in the analog domain before transmitting them to the processor. This merging reduces the number of separate signal connections required, simplifying the interface between the AFE and processor while preserving the adaptability of the system.
3Measurement precision
If more complex transducer arrays are developed, then imaging capability is improved, but power consumption and signal connections increase
Solution Approach 1:
The patent applies segmentation by performing sub-beam forming in the analog domain for complex transducer arrays, which reduces the power consumption associated with processing signals from multiple elements while maintaining the imaging capability provided by the complex array configuration.
4Measurement precision
If more complex transducer arrays are developed, then imaging capability is improved, but the number of signal connections increases
Solution Approach 1:
The patent segments the signal processing function between analog sub-beam forming in the AFE and digital beam forming in the processor, reducing the number of signal connections required to support complex transducer arrays while maintaining the imaging capability provided by the multiple array elements.
Solution Approach 2:
The patent merges multiple sub-beam formed signals in the analog domain before transmission to the processor, reducing the number of signal connections required to support complex transducer arrays while preserving the imaging capability that benefits from having multiple array elements.
Data Source
AI summary
Multi-channel receiver circuitry for a sub-beam forming receiver of an ultrasound system in which digital filtering, down-sampling and successive data storage circuitry impose programmable fine and coarse time delays on received digital data signals.


