Sub-Binary Radix DAC Calibration for Monotonic Linearity
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Solution Overview
Problem
Sub-binary radix digital-to-analog converters (DACs) face issues with non-monotonic transfer functions and reduced dynamic range, requiring additional bits for recovery and calibration to achieve monotonicity, which complicates the conversion process and affects performance metrics like differential non-linearity (DNL) and integral non-linearity (INL).
Innovation Solution
The implementation of a radix conversion module that converts an m-bit digital input signal to an N-bit sub-radix DAC code, utilizing a ladder module and a segment module with specific circuit elements, along with a calibration step using recursive successive approximation and a radix conversion step to improve linearity and monotonicity, thereby enhancing DNL and INL performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If sub-binary radix DAC is used to reduce component count and simplify structure, then device complexity is reduced, but the transfer function becomes non-monotonic and dynamic range is reduced
Solution Approach 1:
The DAC is divided into two independent modules: a ladder module that generates the basic sub-binary radix output and a segment module that adds correction segments. This segmentation allows the main DAC structure to remain simple while the segment module compensates for non-monotonicity by adding or subtracting specific voltage segments to ensure monotonic transfer function behavior.
Solution Approach 2:
The invention changes the operational parameters by introducing calibration bits that adjust the weighting factors of different DAC elements. By dynamically adjusting these parameters through calibration, the system achieves monotonicity without changing the fundamental sub-binary radix structure, thus maintaining simplicity while improving reliability.
2Reliability
If calibration steps are added to achieve monotonicity, then transfer function monotonicity is improved, but conversion process complexity increases
Solution Approach 1:
The calibration process is performed in advance during manufacturing or initialization, and the results are stored as calibration lookup tables. During normal operation, the system simply queries these pre-computed tables rather than performing complex real-time calibration calculations, thus achieving monotonicity without adding significant conversion process complexity.
Solution Approach 2:
The invention introduces an intermediary calibration lookup table that mediates between the simple sub-binary radix conversion and the requirement for monotonicity. The lookup table contains pre-computed correction values that are added to the basic DAC output, providing monotonic behavior without requiring complex real-time processing.
3Quantity of substance
If additional bits are used to recover dynamic range, then dynamic range is improved, but device complexity and conversion overhead increase
Solution Approach 1:
Instead of uniformly increasing the bit width of all DAC elements, the invention applies local quality by adding bits only where needed in the segment module. The segment module selectively adds or subtracts specific voltage segments corresponding to particular bit positions, thereby extending dynamic range only in the regions where the sub-binary radix structure creates limitations.
Data Source
AI summary
An N bit sub-binary radix digital-to analog converter (DAC) includes a radix conversion module that converts an m bit digital input signal to an N bit sub-radix DAC code. A ladder module having NL bits has a plurality of first circuit elements corresponding to first respective bits of the N bit sub-radix DAC code. A segment module having NS bits has at least one second circuit element corresponding to second respective bits of the N bit sub-radix DAC code. N>m, and N is the sum of NL and NS.