Sub-Block Erase Control in Non-Volatile Memory Under Power Limits

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Solution Overview

Problem

Non-volatile memory devices face challenges in balancing increased throughput with power consumption constraints, leading to performance degradation in mobile and storage devices.

Innovation Solution

A non-volatile memory device and storage device that includes independently erasable sub-blocks, with a storage controller selecting an erase mode based on operation schedule and power consumption to control erase operations, allowing for efficient power management and performance optimization.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If erase operations are performed more frequently to maintain performance, then throughput is improved, but power consumption increases

Engineering Contradiction:
ImprovethroughputVSAvoidpower consumption
Core Design Contradiction:
ProductivityVSUse of energy by moving object

Solution Approach 1:

The memory block is divided into multiple independently erasable sub-blocks, allowing selective erasure of only the necessary portions rather than entire blocks. This segmentation enables the system to perform erase operations more efficiently by targeting only the sub-blocks that require erasure, thereby improving throughput while reducing overall power consumption.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The system dynamically selects between different erase modes (first sub-block erase mode and second sub-block erase mode) based on real-time power consumption levels and operation schedules. This dynamic adaptation allows the system to optimize the balance between throughput and power consumption by adjusting erase operation granularity according to current operational conditions.

Inventive Principle:
Principle #15Dynamics

2Use of energy by stationary object

If operations are disabled to satisfy power constraints, then power consumption is controlled, but performance degrades

Engineering Contradiction:
Improvepower consumptionVSAvoidperformance
Core Design Contradiction:
Use of energy by stationary objectVSProductivity

Solution Approach 1:

By segmenting blocks into independently erasable sub-blocks, the system can maintain performance by performing selective erase operations on only the necessary sub-blocks rather than disabling operations entirely. This allows the system to satisfy power constraints while preserving throughput by minimizing unnecessary erase operations.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The system changes operational parameters by selecting different erase modes based on power consumption thresholds and operation schedules. This parameter adjustment enables the system to optimize performance within power constraints by adapting the erase operation granularity (individual sub-block vs. multiple sub-blocks) according to current power availability.

Inventive Principle:
Principle #35Parameter changes

3Use of energy by stationary object

If sub-block erase operations are performed instead of full block erase, then power consumption is reduced, but device complexity increases

Engineering Contradiction:
Improvepower consumptionVSAvoiddevice complexity
Core Design Contradiction:
Use of energy by stationary objectVSDevice complexity

Solution Approach 1:

The implementation of independently erasable sub-blocks within blocks requires additional control logic for selecting and managing sub-blocks. This segmentation enables power reduction through selective erasure but inherently increases device complexity by requiring more sophisticated address decoding and control circuitry to manage the finer-grained erase operations.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The dynamic selection between different erase modes adds control complexity to the system. The storage controller must implement logic to monitor power consumption levels, consult operation schedules, and dynamically switch between first and second sub-block erase modes, thereby optimizing power usage while managing the increased device complexity through adaptive control.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS12524168B2Non-volatile memory device and storage device
Publication Date: 2026.01.13 SAMSUNG ELECTRONICS CO LTD
  • US12524168B2 patent drawing
  • US12524168B2 patent drawing
  • US12524168B2 patent drawing

AI summary

A storage device includes at least one non-volatile memory including a plurality of blocks, each block of the plurality of blocks including a plurality of independently erasable sub-blocks. The storage device further includes a storage controller configured to select an erase mode from among a plurality of erase modes according to at least one of an operation schedule and a power consumption of the non-volatile memory, and control an erase operation of the non-volatile memory, according to the selected erase mode. Based on the selected erase mode being a first sub-block erase mode, the storage controller controls an erase operation with respect to one selected sub-block of a selected block. Based on the selected erase mode being a second sub-block erase mode, the storage controller controls an erase operation with respect to two or more selected sub-blocks of the selected block.