Sub-Block Flash Control for Adjacent Disturb Reliability

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Solution Overview

Problem

Non-volatile memory devices face reliability issues due to a disturb phenomenon caused by operations in adjacent sub-blocks, which affect performance as memory block capacity increases, and existing block-by-block control technologies struggle to maintain performance with growing capacity.

Innovation Solution

A storage controller collects deterioration information on sub-blocks and generates commands to adjust the core of adjacent sub-blocks based on this information, including lowering pass voltage, increasing pass voltage, or changing memory cell types to mitigate the disturb effect, thereby improving reliability and performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If the capacity of memory block increases, then storage capacity is improved, but reliability deteriorates due to disturb phenomenon from adjacent sub-block operations

Engineering Contradiction:
Improvestorage capacityVSAvoidreliability
Core Design Contradiction:
Quantity of substanceVSReliability

Solution Approach 1:

The memory block is divided into multiple sub-blocks that can be independently managed and operated. This segmentation allows selective adjustment of cores in adjacent sub-blocks without affecting the entire block, enabling targeted reliability improvement while maintaining high storage capacity.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different core adjustment levels are applied to different sub-blocks based on their specific deterioration information. Sub-blocks experiencing disturb phenomena receive appropriate core adjustments, while other sub-blocks maintain their original performance characteristics.

Inventive Principle:
Principle #3Local quality

2Device complexity

If existing block-by-block control technology is used, then device complexity is reduced, but performance deteriorates as memory block capacity increases

Engineering Contradiction:
Improvecontrol technology complexityVSAvoidperformance
Core Design Contradiction:
Device complexityVSProductivity

Solution Approach 1:

The control technology is segmented from block-level to sub-block-level operations, allowing finer-grained control without proportionally increasing overall system complexity. The controller manages multiple sub-blocks independently, improving performance for high-capacity blocks.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The system dynamically adjusts core levels of adjacent sub-blocks based on real-time deterioration information and operation types. This dynamic adaptation enables the system to maintain optimal performance across varying workloads and capacity requirements.

Inventive Principle:
Principle #15Dynamics

3Reliability

If read reclaim operations are performed frequently, then reliability is improved, but productivity deteriorates due to increased operation overhead

Engineering Contradiction:
ImprovereliabilityVSAvoidproductivity
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The system performs preliminary core adjustments on adjacent sub-blocks before disturb phenomena cause data deterioration. By proactively adjusting cores based on deterioration information, read reclaim operations are reduced or eliminated, improving productivity while maintaining reliability.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The disturb phenomenon that causes reliability issues is converted into a benefit by using deterioration information to trigger preventive core adjustments. This transforms the harmful effect into a signal for proactive reliability management, reducing the need for corrective read reclaim operations.

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

Data Source

PatentUS20250349375A1Non-volatile memory device, storage device including non-volatile memory device, and method of operating storage device
Publication Date: 2025.11.13 SAMSUNG ELECTRONICS CO LTD
  • US20250349375A1 patent drawing
  • US20250349375A1 patent drawing
  • US20250349375A1 patent drawing

AI summary

An example storage controller includes a host interface, a flash conversion layer, and a flash interface. The host interface receives a read request or a program request from a host device. The flash conversion layer collects deterioration information on a non-volatile memory device and log the deterioration information in a unit of a sub-block, determines a selected sub-block and an adjacent sub-block adjacent to the selected sub-block based on the read request or the program request, and generates a command that adjusts a core of the adjacent sub-block based on the deterioration information. The flash interface transfers the command to the non-volatile memory device.