Isolated Sub-Die Pad Layout for Mixed-Signal Packaged Chips
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Solution Overview
Problem
Ball grid array package technology for 10G Ethernet physical layer integrated circuits faces issues of low yield, poor heat dissipation, high manufacturing cost, and complex PCB design, along with interference between digital and analog grounds.
Innovation Solution
The packaged chip design includes a die pad with electrically isolated first and second sub-die pads, where the first sub-die pad serves as the digital ground and the second as the analog ground, and power bars connected to different positions of the power domains to increase bonding zones for bond wires, reducing ground interference and improving electrical properties.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If ball grid array package technology is used for high-speed signal transmission, then signal transmission capability is improved, but ground interference between digital and analog sections occurs
Solution Approach 1:
The die pad is divided into multiple electrically isolated sub-die pads, with dedicated digital ground sub-die pads and analog ground sub-die pads. This segmentation prevents ground interference by providing separate return paths for digital and analog signals, allowing high-speed transmission without cross-talk between grounds.
Solution Approach 2:
Different regions of the die pad are assigned different ground types (digital or analog) based on local signal requirements. Each sub-die pad maintains its specific ground characteristics locally, ensuring that digital sections have digital ground and analog sections have analog ground, thus eliminating ground interference while supporting high-speed signals.
2Ease of manufacture
If power bond pads are concentrated in the same zone, then connection to power domains is simplified, but bonding zones are limited and electrical properties deteriorate
Solution Approach 1:
Power bond pads are distributed across multiple bonding zones in different spatial locations rather than concentrating them in one zone. This dimensional distribution allows bond wires to connect to power domains from various positions, increasing bonding flexibility and improving electrical properties by reducing current density and inductance while maintaining ease of power domain connection.
Solution Approach 2:
The power bonding function is segmented across multiple discrete bond pads located in different zones. Each power bond pad independently connects to power domains, distributing the current path and improving electrical characteristics such as reducing RLC effects and IR-drop, while still providing comprehensive power domain coverage.
3Area of stationary object
If multiple leads are used to connect power domains, then power distribution coverage is improved, but lead count increases and RLC effects worsen
Solution Approach 1:
Power distribution is achieved by utilizing multiple bonding zones in different spatial locations rather than increasing lead count. The distributed power bond pads across various zones provide extensive power distribution coverage through optimized wire routing in multiple dimensions, maintaining low lead count while reducing RLC effects through shorter and more flexible wire paths.
Data Source
AI summary
A packaged chip includes a die pad and a die. The die pad includes a first sub-die pad and a second sub-die pad. The die is disposed on the die pad. The first sub-die pad and the second sub-die pad are electrically isolated. The first sub-die pad serves as a digital ground. The second sub-die pad serves as an analog ground.