Sub Gate Line Segmentation for LCD RC Delay Compensation
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Solution Overview
Problem
As the surface area of liquid crystal display (LCD) panels increases, resistance-capacitance (RC) time delays in gate signals lead to decreased display quality, manifesting as lower luminance, color mixing, and ghosting due to delayed charging of pixels.
Innovation Solution
The implementation of a display panel design that includes a main gate line and a sub gate line connected via a first connecting part, where the sub gate signal has a transmission difference from the main gate signal, allowing at least one of its rising or falling periods to occur prior to those of the main gate signal, thereby compensating for RC time delays and improving display quality.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If the surface area of LCD panel is increased, then the display coverage and resolution are improved, but the RC time delay of gate signals increases causing display quality degradation
Solution Approach 1:
The gate line is divided into a main gate line and a sub gate line that are spatially separated and connected through connecting parts. This segmentation allows the gate signal to be transmitted through multiple parallel paths, reducing the effective transmission distance and compensating for RC time delays in large-area display panels.
2Device complexity
If a single gate line is used to control pixels, then the device structure is simple, but RC time delay causes charging ratio decrease and display quality lowering
Solution Approach 1:
The gate control function is segmented between main gate lines and sub gate lines. The sub gate lines are connected to the main gate lines through connecting parts positioned in specific regions, creating multiple signal transmission paths that reduce RC time delay effects while maintaining acceptable structural complexity.
Solution Approach 2:
Connecting parts are strategically positioned in specific local regions (such as central areas or non-display regions) to provide targeted RC time delay compensation where it is most needed, rather than uniformly increasing complexity across the entire gate line structure.
3Area of stationary object
If gate signal transmission distance is increased to cover larger panel areas, then display coverage is improved, but charging ratio decreases due to RC time delay
Solution Approach 1:
By segmenting the gate line into main and sub components with strategic connecting parts, the effective signal transmission distance is reduced through parallel paths, allowing large panel areas to be covered while maintaining adequate pixel charging ratios.
Solution Approach 2:
The sub gate lines are configured to receive and transmit gate signals in advance through alternative paths, compensating for the time delay that would otherwise occur in long-distance signal transmission across large panel areas.
Data Source
AI summary
A display apparatus includes a display panel, a gate driving part, and a date driving part. The display panel includes a switching element disposed in association with a pixel, a main gate line connected to the switching element, and a sub gate line spaced apart from the main gate line and connected to the main gate line via a first connecting part. The gate driving part is configured to: provide the main gate line with a main gate signal, and provide the sub gate line with a sub gate signal. The sub gate signal includes a transmission difference from the main gate signal. The data driving part is configured to provide a data line with a data signal.