Sub-group Wear Leveling in Memory Sub-systems

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Current memory sub-systems face premature failure due to uneven wear distribution across memory devices, leading to increased SMU-move operations and reduced lifespan, as all write operations to a given SMU are counted, regardless of even distribution across sub-groups.

Innovation Solution

Implementing sub-group-level write count management, where each SMU is divided into sub-groups, allowing for more granular tracking of write operations, reducing the frequency of SMU-move operations by requiring a higher number of write operations to reach the SMU-move threshold.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If all write operations to an SMU are counted equally regardless of sub-group distribution, then the wear leveling mechanism is simple to implement, but this leads to premature failure due to uneven wear distribution and increased SMU-move operations

Engineering Contradiction:
Improvememory component lifespanVSAvoidwrite count management complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent divides each SMU into multiple sub-groups and maintains separate write counts for each sub-group instead of a single aggregate count. This segmentation allows the system to track wear at a finer granularity, identifying when wear is concentrated in specific sub-groups and triggering SMU-move operations only when necessary, thereby extending memory component lifespan while managing complexity through structured organization.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent applies different wear counting and evaluation criteria to different sub-groups within an SMU based on their local wear characteristics. By monitoring sub-group-level write counts and comparing them against thresholds, the system can identify localized wear patterns and trigger move operations selectively, improving reliability by addressing uneven wear distribution without requiring complex global management.

Inventive Principle:
Principle #3Local quality

2Reliability

If sub-group-level write count tracking is implemented, then wear distribution can be monitored more accurately extending SMU lifespan, but this increases processing power and time requirements

Engineering Contradiction:
ImproveSMU lifespanVSAvoidprocessing power demand
Core Design Contradiction:
ReliabilityVSPower

Solution Approach 1:

By segmenting the wear counting into sub-group level units, the patent enables more accurate wear distribution monitoring that triggers SMU-move operations only when actual wear imbalances occur. This reduces unnecessary move operations and extends SMU lifespan while keeping processing demands manageable through efficient sub-group level tracking rather than exhaustive monitoring.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent changes the parameter of wear counting granularity from aggregate SMU level to sub-group level, and introduces threshold-based triggering mechanisms. This parameter change allows the system to achieve better wear distribution monitoring and extended SMU lifespan while controlling processing power consumption by only initiating move operations when wear patterns cross defined thresholds.

Inventive Principle:
Principle #35Parameter changes

3Reliability

If sub-group-level write count tracking is implemented, then wear distribution can be monitored more accurately extending SMU lifespan, but this increases the complexity of management structures

Engineering Contradiction:
Improvewear distribution uniformityVSAvoidmanagement structure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent organizes the management structure into a hierarchical segmentation with SMUs divided into sub-groups, each with its own write count. This structured segmentation improves wear distribution uniformity by enabling precise tracking and selective move operations, while the hierarchical organization itself provides a manageable framework that prevents overwhelming complexity.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent applies local quality management by treating each sub-group with its own wear count and evaluation criteria. This allows the system to achieve uniform wear distribution across the entire SMU by managing local sub-group conditions independently, simplifying the overall management structure through modular, localized control rather than requiring complex global coordination.

Inventive Principle:
Principle #3Local quality

4Reliability

If SMU-move operations are triggered more frequently to maintain even wear distribution, then wear uniformity is improved, but this reduces processing efficiency and increases time consumption

Engineering Contradiction:
Improvewear uniformityVSAvoidprocessing efficiency
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent changes the triggering parameter from aggregate SMU wear count to sub-group wear count differentials. By monitoring the difference in write counts between sub-groups and triggering move operations only when this differential exceeds a threshold, the system maintains wear uniformity while significantly reducing the frequency of move operations, thereby preserving processing efficiency and avoiding unnecessary interruptions.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS11360885B2Wear leveling based on sub-group write counts in a memory sub-system
Publication Date: 2022.06.14 MICRON TECHNOLOGY INC
  • US11360885B2 patent drawing
  • US11360885B2 patent drawing
  • US11360885B2 patent drawing

AI summary

In an embodiment, a system includes a plurality of memory components that each include a plurality of management groups. Each management group includes a plurality of sub-groups. The system also includes a processing device that is operatively coupled with the plurality of memory components to perform wear-leveling operations that include maintaining a sub-group-level delta write count (DWC) for each of the sub-groups of each of the management groups of a memory component in the plurality of memory components. The wear-leveling operations also include determining, in connection with a write operation to a first sub-group of a first management group of the memory component, that a sub-group-level DWC for the first sub-group equals a management-group-move threshold, and responsively triggering a management-group-move operation from the first management group to a second management group of the memory component.