Sub-Range ADC Architecture for Wideband Timing Error Reduction
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Solution Overview
Problem
Modern communication devices face challenges in sampling analog communication signals across wide frequency bands using a single Analog to Digital Converter (ADC), leading to timing and phase errors, which are difficult to correct and result in increased size, power consumption, and heat generation, especially in powerline communication systems.
Innovation Solution
The use of multiple sub-range ADCs with a central sub-range ADC having greater quantization accuracy and smaller quantization step size, combined with signal combining circuitry to produce a digital communication signal, reduces timing and phase errors and improves resistance to impulse noise.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If multiple individual ADCs are combined to sample wide frequency bands, then the frequency band coverage is improved, but timing and phase errors increase
Solution Approach 1:
The patent divides the wide frequency band into multiple sub-ranges, with each sub-range ADC dedicated to a specific frequency sub-band. This segmentation allows each ADC to operate independently on its assigned sub-range, eliminating the timing and phase synchronization errors that occur when multiple ADCs share the same frequency band. The frequency band coverage is maintained through the combined capability of all sub-range ADCs.
2Measurement precision
If timing and phase error correction circuits are added, then timing and phase errors are corrected, but device size and power consumption increase
Solution Approach 1:
The patent extracts and removes the timing and phase error correction circuits from the system entirely. Instead of adding correction functionality, the design uses dedicated sub-range ADCs for each frequency sub-band, which inherently eliminates timing and phase errors by avoiding the need for multi-ADC synchronization. This approach reduces device complexity while maintaining measurement precision.
3Measurement precision
If timing and phase error correction circuits are added, then timing and phase errors are corrected, but power consumption increases
Solution Approach 1:
The patent eliminates power-consuming timing and phase error correction circuits by using a dedicated sub-range ADC architecture. Each sub-range ADC operates independently on its assigned frequency sub-band, inherently avoiding timing and phase errors without requiring additional power for correction operations. This reduces overall power consumption while maintaining measurement precision.
4Adaptability or versatility
If a single ADC is used, then device size is reduced, but frequency band coverage is limited
Solution Approach 1:
The patent applies local quality by optimizing each sub-range ADC for its specific frequency sub-band. Each ADC is tailored to handle a particular portion of the frequency spectrum with appropriate quantization accuracy, rather than using a single ADC for the entire band. This allows the system to achieve wide frequency band coverage while keeping individual ADC elements simple and manageable.
5Measurement precision
If sub-range ADCs with greater quantization accuracy are used, then measurement precision is improved, but device complexity increases
Solution Approach 1:
The patent segments the frequency band into multiple sub-ranges, allowing each sub-range ADC to use greater quantization accuracy for its specific sub-band without requiring the entire system to handle the complexity of high-precision wide-band conversion. The signal combining circuitry integrates these precise sub-range measurements, achieving overall high measurement precision while managing device complexity through modular segmentation.
Data Source
AI summary
An analog to digital converter with increased sub-range resolution and method for using the analog to digital converter is described herein. The device includes an analog front end that produces an analog communication signal, a digital front end that receives a digital communication signal, and an Analog to Digital Converter (ADC) that samples the analog communication signal across a full-range. The ADC includes a plurality of sub-range ADCs, each sub-range ADC measuring the analog communication signal across at least one respective sub-range of the full-range, the plurality of sub-ranges extending across the full-range, a central sub-range ADC having greater quantization accuracy than at least one other sub-range ADC. The ADC also includes signal combining circuitry operable to process outputs of the plurality of sub-range ADCs to create the digital communication signal.