Sub-Resolution Pattern Formation Using Sacrificial Layers
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Solution Overview
Problem
Photolithography processes in semiconductor device fabrication face challenges in forming fine patterns with line widths below the resolution limit, making it difficult to achieve the desired integration, reliability, and response speed in semiconductor devices.
Innovation Solution
A method involving the formation of multiple sacrificial layers and pattern layers with specific etch selectivities, allowing for the creation of fine patterns by selectively removing these layers to expose the object structure, enabling the formation of patterns with dimensions below the photolithography resolution limit without requiring advanced photolithography processes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If photolithography processes are used to fabricate isolation layers or metal wirings, then the manufacturing process is simple and well-established, but the line width cannot be reduced below the resolution limit of the photolithography process
Solution Approach 1:
The pattern formation process is segmented into multiple steps: forming mandrel patterns, depositing first sacrificial layers, forming second patterns, depositing second sacrificial layers, and performing planarization. This segmentation allows each step to be optimized independently, enabling sub-resolution line widths while maintaining process manageability through modular fabrication steps
Solution Approach 2:
Sacrificial layers are introduced as intermediary materials that enable the formation of fine patterns. These sacrificial layers (first and second) serve as temporary structures that guide the deposition and etching processes, allowing the creation of patterns below the photolithography resolution limit. The sacrificial layers are subsequently removed after serving their templating function
2Manufacturing precision
If multiple sacrificial layers and pattern layers are formed with specific etch selectivities, then fine patterns below photolithography resolution limit can be formed, but the process complexity increases
Solution Approach 1:
The process utilizes etch selectivity as a key parameter to differentiate between various layers. By controlling the etch selectivity between pattern layers and sacrificial layers, the method enables selective removal of sacrificial materials while preserving the desired fine patterns. This parameter control allows precise pattern formation without requiring complex additional equipment
Solution Approach 2:
Mandrel patterns are formed in advance as templates before the actual fine pattern formation. These preliminary mandrel structures guide the subsequent deposition of sacrificial layers and pattern materials, ensuring that the final patterns achieve the required sub-resolution dimensions. The preliminary action of forming mandrels simplifies the overall process by providing a structured framework for subsequent steps
3Productivity
If the same materials are used for both pattern and sacrificial layers, then the manufacturing process is simplified and productivity is improved, but selective removal of sacrificial layers becomes more difficult
Solution Approach 1:
Different local regions of the structure are assigned different qualities through the use of multiple sacrificial layers with distinct properties. The first sacrificial layer has different etch selectivity characteristics than the second sacrificial layer, allowing selective removal of each layer at appropriate process stages. This local differentiation enables the use of same base materials while achieving the required selective etching behavior
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method allows for the formation of fine patterns with line widths and pitches below the photolithography resolution limit, enhancing semiconductor device integration, reliability, and response speed by using the same materials for both pattern and sacrificial layers, simplifying the manufacturing process and improving productivity.
Implementation Method 1
The first patterns are selectively removed to form an opening that exposes the object structure
Data Source
AI summary
Methods of forming patterns in semiconductor devices are provided including forming first patterns spaced apart from one another on an object structure. A first sacrificial layer is formed conformally on the first patterns and the object structure. A second pattern is formed on a sidewall of the first sacrificial layer, the second pattern having a height smaller than that of the first pattern from an upper surface of the object structure. The first patterns are selectively removed to form an opening that exposes the object structure. A third pattern is formed on a sidewall of the opening.


