Sub Word Line Driver Layout for Diagonal Pickup Region
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Solution Overview
Problem
Conventional semiconductor memory devices face challenges in forming a well pickup active region in the PMOS region of sub word line drivers while minimizing the driver's region size, often requiring shared well pickup active regions.
Innovation Solution
The sub word line driver is designed with a layout that includes multiple active regions arranged in line shapes, with main word lines extending diagonally across these regions to create a pickup active region between them, allowing for the formation of a well pickup active region without increasing the driver's area.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If the sub word line driver size is reduced, then area efficiency is improved, but the ability to form a well pickup active region in the PMOS region deteriorates
Solution Approach 1:
The patent applies dimensionality change by forming the well pickup active region in a diagonal direction between first and second main word lines, rather than in the conventional horizontal or vertical arrangement. This diagonal positioning allows the pickup region to be formed in the unused space between crossed main word lines, enabling well pickup functionality without increasing the overall driver area.
Solution Approach 2:
The patent segments the driver region into distinct areas: first active regions for PMOS transistors, second active regions for NMOS transistors, and a pickup active region positioned between the main word lines. This segmentation allows independent optimization of each region, enabling the pickup region to be formed separately without affecting the transistor active regions.
2Area of stationary object
If the sub word line driver region is minimized, then device density is improved, but transistor characteristic consistency deteriorates
Solution Approach 1:
The patent applies local quality by providing dedicated first active regions for PMOS transistors and second active regions for NMOS transistors, with each region optimized for its specific transistor type. The pickup active region is positioned in the space between main word lines, allowing each area to have optimized characteristics for its intended function while maintaining overall compactness.
Data Source
AI summary
A layout structure of a sub word line of a semiconductor memory device is disclosed. A sub word line driver of a semiconductor memory device includes: a plurality of first active regions arranged in a line shape in a first direction; a plurality of second active regions spaced apart from the plurality of first active regions a predetermined distance in a second direction, and arranged in a line shape in the first direction; a first main word line disposed over the first active regions, and formed in a diagonal direction in the first active regions; a second main word line disposed over the second active regions, and formed in a diagonal direction in the second active regions; and a pickup active region disposed between the first main word line and the second main word line.