Sub Word Line Driver Voltage Switching for GIDL Reduction
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Solution Overview
Problem
Conventional semiconductor devices with sub-word line drivers experience significant gate-induced diode leakage (GIDL) current during precharge and standby modes, which is not negligible and affects power consumption.
Innovation Solution
A semiconductor device with a selected sub-word line driver and a first voltage switching circuit that selectively supplies different power voltages to the sub-word line driver, switching between a higher power voltage for active mode and a lower power voltage for precharge mode to reduce GIDL current.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the PMOS transistor source is supplied with ground voltage during precharge mode, then the sub word line is pulled down to logic low level, but significant GIDL current is generated in the PMOS transistor
Solution Approach 1:
The patent applies parameter changes by dynamically adjusting the source voltage of the PMOS transistor during precharge mode. Instead of using ground voltage (0V), the source is supplied with a voltage that is higher than ground but lower than the sub word line voltage, reducing the gate-to-source voltage difference and thereby minimizing GIDL current while still enabling the sub word line to be pulled down to logic low level.
Solution Approach 2:
The patent implements dynamics by making the PMOS source voltage adjustable and time-dependent. A voltage switching circuit dynamically changes the source voltage based on operating mode: during precharge mode, it supplies an intermediate voltage level; during active mode, it supplies ground voltage. This dynamic adjustment optimizes both power consumption and circuit functionality across different operating conditions.
2Power
If the PMOS transistor source is supplied with boosting voltage during active mode, then the sub word line is pulled up to logic high level, but the circuit complexity increases due to voltage switching requirements
Solution Approach 1:
The patent applies universality by designing a voltage switching circuit that performs multiple functions: it switches between ground voltage and boosting voltage based on operating mode, and it also provides the boosted voltage to the PMOS source during precharge mode to reduce GIDL current. This multi-functional approach consolidates voltage control operations into a single circuit block, managing complexity while achieving multiple objectives.
Data Source
AI summary
The semiconductor device incorporates a selected sub word line driver and a first voltage switching circuit. The selected sub word line driver has an input node connected to a selected main word line, an output node connected to a selected sub word line, a reference node supplied with a common reference voltage, and a power node. The first voltage switching circuit selectively supplies a first power voltage, a second power voltage, or the common reference voltage to the power node of the selected sub word line driver. In an active mode, the first voltage switching circuit supplies the first power voltage to pull the selected sub word line to a logic high level. In a precharge mode, the first voltage switching circuit supplies the common reference voltage and then supplies the second power voltage, thereby pulling the selected sub word line to a logic low level. A voltage level of the second power supply node is lower than a voltage level of the first power voltage and higher than the common reference voltage.