Sub-codeword Current Management in Non-volatile Memory
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Solution Overview
Problem
Non-volatile memory systems face challenges in maintaining high throughput while keeping power supply current within allowed peak levels, as excessive current can lead to reduced throughput and increased bit error rates, especially in reversible resistivity memory cells.
Innovation Solution
Adaptive adjustment of programming conditions at the sub-codeword level to manage power supply current, allowing lower current for some portions of data to reduce bit error rates without increasing the overall bit error rate for the codeword, thereby maintaining high throughput and successful decoding.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If programming current is increased to reduce bit error rates, then data reliability improves, but power supply current exceeds peak allowed levels
Solution Approach 1:
The codeword is divided into multiple sub-codewords that can be programmed independently with different current levels. This allows selective application of higher programming current to specific sub-codewords that require it for reliable programming, while using lower current for other sub-codewords, thereby managing peak power supply current while maintaining overall data reliability.
Solution Approach 2:
Different programming conditions (current levels) are applied to different portions (sub-codewords) of the data based on their specific requirements. This local differentiation allows optimizing reliability for each sub-codeword individually without requiring uniform high current across all data, thus controlling overall power consumption.
2Power
If programming current is limited to stay within peak power supply current, then power consumption is controlled, but bit error rates increase
Solution Approach 1:
By segmenting the codeword into sub-codewords, the system can apply differentiated current strategies: lower current for sub-codewords that can be programmed successfully at reduced power, and higher current only when necessary for specific sub-codewords requiring greater reliability, thus balancing power consumption with error rate management.
Solution Approach 2:
The programming current level is dynamically adjusted based on the specific requirements of each sub-codeword and the current power supply conditions. The system can adaptively select appropriate current levels during programming operations, optimizing the trade-off between power consumption and bit error rate in real-time.
3Reliability
If uniform high programming current is applied to all data portions, then bit error rates are minimized, but power supply current exceeds peak allowed levels and throughput decreases
Solution Approach 1:
Segmenting the programming operation into sub-codeword units enables parallel or pipelined processing of different sub-codewords at different current levels. This increases throughput by allowing the system to efficiently manage multiple programming operations simultaneously while maintaining reliability through selective application of appropriate current levels to each segment.
Data Source
AI summary
Technology is described for keeping current (e.g., peak power supply current or ICC) in a non-volatile memory system within a target while maintaining high throughput. Programming conditions are adaptively changed at the sub-codeword level in order to keep power supply current of the memory system within a target. In one embodiment, a chunk of data that corresponds to a sub-codeword is written while consuming lower than normal programming current in order to keep power supply current within a target. The relatively low programming current may increase the expected raw BER. However, other portions of the codeword can be written with a higher than normal programming current, which results in a lower expected bit raw error rate for the memory cells that store that portion.