Sub-frame Tapered Reset Using Independent Pixel Buses

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Solution Overview

Problem

Conventional CMOS imaging sensor technologies face challenges in concurrently resetting multiple pixel cells from different rows during sub-frame integration mode, leading to artifacts that degrade image quality due to uneven current distribution and noise.

Innovation Solution

Implementing a plurality of independent reset buses for a column of pixels, allowing for independent reset of rows based on specific criteria, such as integration mode and integration time, to ensure uniform pixel operation and mitigate noise.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If a common current source is used for resetting pixel cells in sub-frame integration mode, then multiple rows can be reset during a common time period, but the current is divided among multiple pixel cells resulting in artifacts and degraded image quality

Engineering Contradiction:
Improvereset speedVSAvoidimage quality
Core Design Contradiction:
ProductivityVSManufacturing precision

Solution Approach 1:

The patent divides the pixel array into multiple segments, each served by a dedicated current source. Specifically, first and second current sources independently serve first and second rows of pixel cells respectively, eliminating current division and the resulting artifacts while maintaining high-speed concurrent reset capability across multiple rows

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent implements local quality by providing each row of pixel cells with a dedicated current source optimized for that specific row. This ensures that each pixel cell receives the full, undivided current necessary for high-quality reset operation, while the system as a whole achieves high productivity through parallel operation of multiple current sources

Inventive Principle:
Principle #3Local quality

2Loss of time

If multiple rows of pixel cells are reset concurrently in sub-frame integration mode, then reset time is reduced, but current division leads to noise and artifacts

Engineering Contradiction:
Improvereset timeVSAvoidnoise and artifacts
Core Design Contradiction:
Loss of timeVSObject-generated harmful factors

Solution Approach 1:

The patent segments the reset operation by assigning dedicated current sources to different rows. This allows multiple rows to be reset concurrently without current division, as each row receives its own full-current supply from a dedicated source, thereby eliminating noise and artifacts while maintaining reduced reset time

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent merges the functionality of multiple current sources to achieve concurrent reset of multiple rows. By combining independent current sources that each serve specific rows, the system achieves both time efficiency and high image quality that would be impossible with a single shared current source

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS8488025B2Sub-frame tapered reset
Publication Date: 2013.07.16 SAMSUNG ELECTRONICS CO LTD
  • US8488025B2 patent drawing
  • US8488025B2 patent drawing
  • US8488025B2 patent drawing

AI summary

Systems and methods are provided that facilitate employing a plurality of independent reset buses for a column of pixels in a pixel array of a CMOS sensor imager. Utilization of the plurality of independent reset buses for the column of pixels can enable independent reset to be effectuated when employing sub-frame integration. For example, rows to be read and reset during a given readout time interval can be selected based upon one or more criteria. Further, each of the rows selected during the given readout time interval can be associated with a respective distinct reset bus. By leveraging the plurality of independent reset buses, uniformity in pixel operation can be maintained whether operating in full frame integration mode or sub-frame integration mode. Thus, noise resultant from changing between integration modes can be mitigated by using the plurality of independent reset buses.