Display Driving Circuit Layout for Expanded Corner Display Area
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Solution Overview
Problem
Existing display apparatuses face challenges in extending the display area while minimizing the non-display area, particularly in curved and foldable designs, where the design of driving circuits and pixel circuits can hinder the expansion of the display area.
Innovation Solution
The display apparatus incorporates a substrate with a pixel circuit area and a driving circuit region, featuring a sub-driving circuit portion over the pixel circuit area and a main driving circuit portion on either side, with specific gate and scan driving circuits, and input lines configured to optimize the layout and reduce overlap, allowing for an extended display area including corner regions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of moving object
If driving circuits are arranged in the peripheral area, then the display area can be extended, but the non-display area cannot be reduced sufficiently
Solution Approach 1:
The sub-gate driving circuit is arranged in the thickness direction (vertical dimension) by disposing it over the pixel circuit area, transforming a 2D layout problem into a 3D solution. This allows the driving circuit to occupy space above the pixel circuit rather than consuming peripheral horizontal space, thereby extending the display area while minimizing the non-display area.
Solution Approach 2:
The sub-gate driving circuit is nested over the pixel circuit area, with the gate initialization signal output line passing through the pixel circuit region to reach the pixel circuit. This nesting arrangement allows the driving circuit to be positioned within the boundaries of the pixel circuit area, effectively utilizing vertical space and reducing peripheral non-display area.
2Area of moving object
If sub-gate driving circuit is disposed over pixel circuit area, then display area is extended, but signal line overlap and interference increase
Solution Approach 1:
The gate initialization signal transmission path is segmented into two parts: the sub-gate signal output line from the sub-gate driving circuit, and the main gate signal output line from the main gate driving circuit. These segmented lines work together to provide the gate initialization signal to the pixel circuit, allowing the sub-gate driving circuit to be positioned over the pixel circuit area while managing signal line complexity through functional division.
Solution Approach 2:
The main gate signal output line acts as an intermediary that works in conjunction with the sub-gate signal output line. The main gate signal output line crosses the sub-gate signal output line to provide the gate initialization signal from the main gate driving circuit to the pixel circuit, facilitating signal transmission while managing the spatial arrangement and reducing interference.
3Ease of manufacture
If main gate signal output line and input lines cross, then routing flexibility is improved, but signal interference and crosstalk increase
Solution Approach 1:
Different regions of the signal line routing are designed with different characteristics. The main gate signal output line and sub-gate signal output line are allowed to cross in specific regions where interference can be managed, while in other regions they are routed separately to minimize interference. This local differentiation of routing quality allows crossing where necessary while maintaining signal integrity where critical.
Solution Approach 2:
The signal lines are arranged in multiple layers in the vertical dimension, allowing the main gate signal output line and input lines to cross without direct contact. By utilizing the thickness direction for layer separation, the design achieves routing flexibility while minimizing signal interference through spatial isolation in the vertical dimension.
Data Source
AI summary
A display apparatus is disclosed that includes a substrate including a pixel circuit area and a driving circuit region, a sub-gate driving circuit disposed over the pixel circuit area, a main gate driving circuit arranged on a left side or a right side of the pixel circuit area, a main gate signal output line configured to transfer an output signal of the main gate driving circuit, a sub-gate signal output line configured to transfer an output signal of the sub-gate driving circuit, and a plurality of input lines crossing the main gate signal output line, wherein the plurality of input lines extend to cross the sub-gate signal output line.