Sublithographic Electrical Fuses Using Block Copolymer Self-Assembly
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Solution Overview
Problem
The semiconductor industry faces challenges in scaling electrical fuses and resistors due to limitations in achieving sublithographic dimensions, which restricts the reduction of programming current density and resistor size, making it difficult to manufacture components with dimensions smaller than what is achievable by conventional lithography tools.
Innovation Solution
The use of self-aligned self-assembly polymers to form sublithographic dimensions in electrical fuses and resistors by creating patterns of parallel polymer block lines or cylindrical structures within insulator layers, which are then transferred into semiconductor layers, allowing for smaller cross-sectional areas and reduced programming current requirements.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional lithography tools are used to pattern electrical fuse structures, then manufacturing process is simple and well-established, but the minimum achievable dimension is limited to lithographic minimum (about 50 nm)
Solution Approach 1:
The patent divides the patterning process into multiple stages: first forming a mandrel structure at lithographic minimum dimension, then using self-assembling block copolymers to create additional sublithographic features. This segmentation allows achieving dimensions below the lithographic limit while maintaining manufacturing feasibility through sequential simpler steps.
Solution Approach 2:
The patent introduces self-assembling block copolymers as an intermediary material that enables sub-lithographic patterning. These copolymers self-organize into nanoscale structures that serve as templates for forming the final sublithographic features, bridging the gap between lithographic minimum and desired smaller dimensions.
2Reliability
If the width of the fuselink is reduced to achieve higher current density, then programming current requirements are met, but the dimension approaches or reaches the lithographic minimum limit
Solution Approach 1:
The patent transitions from two-dimensional lithographic patterning to three-dimensional self-assembled structures. By using block copolymers that self-organize vertically and laterally, the process achieves sublithographic cross-sectional dimensions that provide higher current density while maintaining manufacturability through a different dimensional approach.
Solution Approach 2:
The patent changes the physical and chemical parameters of the patterning process by using self-assembling block copolymers with specific block compositions and molecular weights. These parameter changes enable the formation of structures with dimensions below the lithographic minimum, achieving the required current density for reliable programming.
3Area of stationary object
If smaller programming transistors are used to reduce device area, then integration density increases, but delivering sufficient current density to the fuselink becomes difficult
Solution Approach 1:
The patent segments the current path by creating multiple parallel sublithographic fuselinks instead of a single larger link. This segmentation allows the total current requirement to be distributed across multiple smaller pathways, enabling smaller transistors to deliver sufficient total current while maintaining high current density in each individual path for reliable electromigration.
Solution Approach 2:
By changing the dimensional parameters of the fuselink to sublithographic scales through self-assembly, the patent achieves higher current density in a smaller cross-section. This parameter change allows smaller transistors to provide adequate current while the intensified current density in the narrower fuselink ensures reliable programming.
4Manufacturing precision
If electrical fuses are scaled down to sublithographic dimensions, then device area and programming current are reduced, but conventional manufacturing methods cannot achieve the required precision
Solution Approach 1:
The patent employs self-assembling block copolymers that automatically organize into the desired nanoscale patterns without requiring external guidance at that scale. This self-service capability enables sublithographic patterning to occur spontaneously through thermodynamic self-organization, overcoming the limitation of conventional lithography and making sublithographic manufacturing feasible.
Solution Approach 2:
The patent replaces the mechanical/optical lithographic system with a chemical self-assembly system. Instead of using light to pattern structures at the desired scale, the process uses chemical self-organization of block copolymers to form sublithographic features, substituting a different physical mechanism that operates effectively at the required dimension scale.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables the creation of electrical fuses and resistors with sublithographic dimensions, requiring lower programming currents and allowing for smaller transistor sizes, thus improving the scalability and efficiency of semiconductor structures.
Implementation Method 1
Self-assembling block copolymers containing two or more different polymeric block components that are immiscible with one another are applied within the elongated groove and annealed to form a first set of parallel polymer block lines containing a first polymeric block component and a second set of parallel polymer block lines containing a second polymeric block component
Implementation Method 2
The first set of parallel polymer block lines are etched selective to the second set and the insulator layer
Implementation Method 3
The mechanism for programming an electrical fuse is electromigration of a metal semiconductor alloy induced by an applied electrical field and a raised temperature on a portion of the electrical fuse structure
Implementation Method 4
The rate and extent of electromigration during programming of an electrical fuse is dependent on the temperature and the current density at the electromigrated portion
Data Source
AI summary
Electrical fuses and resistors having a sublithographic lateral or vertical dimension are provided. A conductive structure comprising a conductor or a semiconductor is formed on a semiconductor substrate. At least one insulator layer is formed on the conductive structure. A recessed area is formed in the at least one insulator layer. Self-assembling block copolymers are applied into the recessed area and annealed to form a fist set of polymer blocks and a second set of polymer blocks. The first set of polymer blocks are etched selective to the second set and the at least one insulator layer. Features having sublithographic dimensions are formed in the at least one insulator layer and/or the conductive structure. Various semiconductor structures having sublithographic dimensions are formed including electrical fuses and resistors.