Display Substrate Sub-Pixel Circuit Layout for IR Drop and Resolution

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Solution Overview

Problem

Existing display technologies face challenges in optimizing space and increasing resolution while maintaining high gray level grade and display quality in display substrates using OLED or QLED devices.

Innovation Solution

A display substrate design with symmetrical sub-pixel circuits and a light emitting control sub-circuit configuration, along with auxiliary power and sensing lines, optimizes space and enhances resolution without affecting normal display.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If the pixel circuit uses a conventional asymmetric layout, then the circuit design is simpler, but the space utilization is lower and resolution is limited

Engineering Contradiction:
ImproveresolutionVSAvoidcircuit layout complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent applies asymmetry principle by intentionally designing the pixel circuit with asymmetric layout where the anode and cathode are positioned at different locations, and the light emitting element is configured to emit light from a specific electrode. This asymmetric arrangement optimizes space utilization and enables higher resolution display while maintaining manageable circuit design complexity through strategic component placement.

Inventive Principle:
Principle #4Asymmetry

2Reliability

If the display substrate uses more power lines to maintain voltage stability, then the IR drop is reduced, but the space for display region is decreased

Engineering Contradiction:
Improvevoltage stabilityVSAvoiddisplay region area
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The patent merges the power line function with the circuit layout by integrating power delivery paths through the asymmetric electrode configuration. The anode and cathode are strategically positioned to serve both as light emitting electrodes and as voltage reference points, reducing the need for separate dedicated power lines and thereby preserving display region area while maintaining voltage stability.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent utilizes the spatial dimension by positioning electrodes at different locations across the pixel structure. The asymmetric layout allows power delivery to occur through spatial distribution rather than requiring additional planar power lines, effectively using the vertical and lateral dimensions to reduce IR drop without consuming additional display area.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Manufacturing precision

If the pixel circuit components are arranged in a compact layout, then the resolution is increased, but the circuit design and manufacturing complexity increases

Engineering Contradiction:
ImproveresolutionVSAvoidmanufacturing complexity
Core Design Contradiction:
Manufacturing precisionVSEase of manufacture

Solution Approach 1:

The patent segments the pixel circuit into distinct functional zones with the asymmetric electrode layout creating clear separation between light emitting regions and control circuit regions. This segmentation allows for standardized manufacturing processes where each segment can be fabricated independently with precise control, achieving high resolution without proportionally increasing overall manufacturing complexity.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS12518699B2Display substrate and display apparatus
Publication Date: 2026.01.06 HEFEI BOE ZHUOYIN TECH CO LTD
  • US12518699B2 patent drawing
  • US12518699B2 patent drawing
  • US12518699B2 patent drawing

AI summary

A display substrate includes an underlay substrate and a plurality of pixel unit groups. The plurality of pixel unit groups are located in a display region of the underlay substrate. At least one pixel unit group includes a plurality of sub-pixel groups, wherein at least one sub-pixel group includes a pixel circuit. The pixel circuit includes a first sub-pixel circuit, a second sub-pixel circuit, and a light emitting control sub-circuit. The first sub-pixel circuit and the second sub-pixel circuit are both electrically connected to the light emitting control sub-circuit. The light emitting control sub-circuit is configured to control a first light emitting element electrically connected to the first sub-pixel circuit to emit light, and to control a second light emitting element electrically connected to the second sub-pixel circuit to emit light.