Subsampling Motion Detection Without PLL Frequency Dividers
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Solution Overview
Problem
Existing motion detectors using phase lock loops (PLL) face high power consumption due to the need for frequency dividers or rapid phase detection, which is inefficient in terms of energy usage.
Innovation Solution
A subsampling motion detector that employs a subsampling phase detector (SSPD) or subsampling analog-to-digital converter (SSADC) to detect phase differences between high and low frequency oscillation signals, eliminating the need for frequency dividers and reducing power consumption by controlling the oscillation frequency through injection locking and low-frequency controllable oscillators.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If a frequency divider is used to divide the high frequency oscillation signal before phase detection, then the phase detection can be performed at a lower frequency, but the power consumption increases significantly
Solution Approach 1:
The patent extracts and eliminates the frequency divider component from the traditional PLL architecture. By using a subsampling phase detector that directly compares the high frequency oscillation signal with a low frequency reference signal without prior division, the design removes the power-hungry frequency divider while maintaining phase detection functionality.
Solution Approach 2:
The patent changes the operating parameters of the phase detector to accept and process high frequency signals directly. The subsampling phase detector is designed to sample the high frequency oscillation signal at a lower rate, effectively changing the detection mechanism to accommodate direct high frequency input without requiring frequency division.
2Device complexity
If a high frequency reference signal is provided for direct comparison with the high frequency oscillation signal, then no frequency divider is needed, but the phase detector must operate at a fast rate which increases power consumption
Solution Approach 1:
The patent removes the frequency divider from the PLL structure and instead introduces a subsampling phase detector that can directly handle high frequency signals. This structural change simplifies the overall circuit by eliminating the frequency division stage while maintaining the essential phase comparison function.
Solution Approach 2:
The subsampling phase detector employs periodic sampling of the high frequency oscillation signal at a lower rate. By periodically capturing phase information at strategically timed intervals rather than continuously comparing at full high frequency, the detector reduces power consumption while still accurately tracking phase differences.
3Reliability
If traditional PLL components are used for motion detection, then stable high frequency oscillation can be achieved, but the power consumption is high due to frequency dividers and rapid phase detection requirements
Solution Approach 1:
The patent extracts and removes the frequency divider component from the traditional PLL architecture. By using a subsampling phase detector that directly compares the high frequency oscillation signal with a low frequency reference signal without prior division, the design removes the power-hungry frequency divider while maintaining phase detection functionality.
Solution Approach 2:
The subsampling phase detector employs periodic sampling of the high frequency oscillation signal at a lower rate. By periodically capturing phase information at strategically timed intervals rather than continuously comparing at full high frequency, the detector reduces power consumption while still accurately tracking phase differences.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The subsampling motion detector significantly reduces power consumption while maintaining accurate motion detection by isolating Doppler shifts from environmental interference, achieving efficient operation without the need for traditional PLL components.
Implementation Method 1
the first wireless RF signal is injected to the high frequency oscillator for controlling the high frequency oscillator through injecting locking
Implementation Method 2
a subsampling phase detector (SSPD) receiving the high frequency oscillation signal and the low frequency oscillation signal and detecting a phase difference between the high frequency oscillation signal and the low frequency oscillation signal
Implementation Method 3
a low frequency controllable oscillator generating a low frequency oscillation signal according to a control signal
Implementation Method 4
a motion detector detecting the status of displacement of an object by the Doppler Effect requires a high frequency signal output from an oscillation source operated at a high frequency
Data Source
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AI summary
A subsampling motion detector(100, 150, 200, 300) configured to detect motion information of an object (24) under measurement receives a first wireless radio frequency (RF) signal and transmits a second wireless RF signal, the first wireless RF signal being generated by reflecting the second wireless RF signal from the object (24). A controllable oscillator (18, 58) outputs an oscillation signal, wherein the first wireless RF signal is injected to the controllable oscillator (18, 58) for controlling the controllable oscillator (18, 58) through injecting locking. The subsampling motion detector (100, 150, 200, 300) further includes a subsampling phase detector (SSPD) (12, 112, 202) generating a control signal according to the oscillation signal generated by the controllable oscillator (18, 58) and a reference frequency (fXTAL), the SSPD outputting the control signal to the controllable oscillator (18, 58) for controlling the controllable oscillator (18, 58), the oscillation signal of the controllable oscillator (18, 58) being locked to a multiple of the reference frequency (fXAL) and the control signal representing the motion information of the object (24).