Sub-Sampling PLL Bandwidth Stabilization Under PVT Variations
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Solution Overview
Problem
Phase-locked loops (PLLs) experience unstable performance due to process-voltage-temperature (PVT) variations affecting bandwidth, which are influenced by parameters like charge pump current, frequency divider coefficient, and voltage-controlled oscillator gain.
Innovation Solution
A sub-sampling PLL is designed with a phase detector, charge pump, oscillator, buffer, slew rate control circuit, and pulse width control circuit to stabilize bandwidth by controlling slew rate and pulse width, thereby isolating the PLL from PVT variations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional PLL parameters (charge pump current, frequency divider coefficient, VCO gain) are used to control bandwidth, then the PLL can operate with basic functionality, but the bandwidth becomes unstable due to PVT variations
Solution Approach 1:
The patent changes the control parameter from conventional PLL parameters (charge pump current, frequency divider coefficient, VCO gain) to pulse width of the pulse signal. By controlling the pulse width instead of these traditional parameters, the bandwidth becomes determined by the pulse width rather than being sensitive to PVT variations affecting the other parameters. This parameter substitution resolves the contradiction by making bandwidth stable while maintaining adaptability.
2Productivity
If the charge pump current is increased to improve bandwidth control, then the bandwidth can be adjusted, but the performance becomes unstable under PVT variations
Solution Approach 1:
The patent extracts the bandwidth control function from the charge pump current and separates it into a distinct pulse width control mechanism. The pulse signal with controlled width is fed to the charge pump, allowing bandwidth control to be independent of the charge pump's operational characteristics. This extraction removes the coupling between bandwidth control and PVT-sensitive parameters, resolving the contradiction between control capability and stability.
3Device complexity
If conventional PLL design is used, then the circuit structure remains simple, but the bandwidth cannot be stabilized against PVT variations
Solution Approach 1:
The patent introduces a dynamic pulse width control mechanism that adapts to PVT variations. The pulse width is adjusted based on detected bandwidth conditions, creating a dynamic control system that maintains stability without requiring complex static compensation circuits. This dynamic approach achieves bandwidth stabilization with minimal additional circuitry, resolving the contradiction between simplicity and reliability.
Data Source
AI summary
The present invention provides a sub-sampling PLL including a first phase detector, a first charge pump, an oscillator and a first buffer is disclosed. In the operations of the sub-sampling PLL, the first phase detector uses a reference clock signal to sample a feedback signal to generate a first phase detection result, the first charge pump generates a first signal according to the first phase detection result and a pulse signal, the oscillator generates an output clock signal according to the first signal, and the first buffer receives the output clock signal to generate the feedback signal, and buffer further using a slew rate control signal to control a slew rate of the feedback signal.