Storage Read Caching for Faster Subsequent Data Access
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Solution Overview
Problem
Repeating operations for accessing the same data in storage devices leads to increased latency and resource consumption, affecting the quality of service (QoS) and inefficiently using resources.
Innovation Solution
A storage device stores a link between logical and physical addresses in RAM after a first read operation, allowing subsequent read commands to skip redundant conversions and operations based on this link, thereby reducing latency and conserving resources.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the storage device performs complete read operations including address conversion for each read command, then the data can be accurately located and retrieved, but the latency increases and resources are consumed inefficiently
Solution Approach 1:
The storage device performs preliminary actions by converting logical addresses to physical addresses and storing the results in a cache memory structure during initial read operations. This preliminary address conversion and caching allows subsequent read operations to skip the time-consuming address conversion process, directly retrieving data from cached physical addresses, thereby reducing latency while maintaining accurate data location.
2Reliability
If the storage device repeats address conversion operations for subsequent read commands, then the correct physical addresses are obtained, but the processing time and resource consumption increase
Solution Approach 1:
The storage device creates a copy of the address translation results by storing the converted physical addresses in a cache memory structure. This copied information allows subsequent read operations to use the pre-computed physical addresses directly, eliminating the need to repeat the entire address conversion process while maintaining translation accuracy, thus improving processing efficiency.
3Loss of time
If the storage device stores all read operations in cache memory, then subsequent read operations can be performed faster, but the memory resource consumption increases
Solution Approach 1:
The storage device applies local quality by selectively caching only the address translation information (logical to physical address mappings) rather than caching all data read operations. This approach caches only the necessary metadata needed for subsequent address conversion, reducing the quantity of data stored in cache memory while still enabling fast subsequent read operations through the cached address mappings.
Data Source
AI summary
In some implementations, a storage device may receive, from a host device, a first read command that indicates a first logical address for data stored on the storage device. The storage device may translate the first logical address to a local address of the storage device. The storage device may store an indication of a link between the first logical address and the local address on a random access memory (RAM) of the storage device. The storage device may receive a second read command that indicates a second logical address for stored data on the storage device. The storage device may identify a match between the first logical address and the second local address. The storage device may provide the data to the host device based at least in part on the match and the link between the first logical address and the local address.