Semiconductor Substate Bias Voltage Generation Circuits Leakage Control

Solution Overview

Problem

Existing semiconductor devices face challenges in efficiently controlling bulk voltages across PMOS and NMOS transistors, particularly in power-down and operation modes, leading to excessive current consumption due to frequent mode transitions.

Innovation Solution

The semiconductor device incorporates switching control signal generation circuits and bulk voltage generation circuits that adjust bulk voltages after a preset delay period in power-down mode and during operation modes, optimizing voltage levels to minimize current consumption by maintaining controlled states during frequent mode transitions.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If bulk voltages are adjusted frequently during mode transitions, then leakage current control is improved, but power consumption increases due to frequent switching operations

Engineering Contradiction:

Improveleakage current controlVSAvoidpower consumption

Core Design Contradiction:

ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent applies preliminary action by generating switching control signals in advance based on predicted mode transitions. The first switching control signal generation circuit generates a signal enabled in synchronization with a delay period after power-down mode entry, and the second circuit generates a signal enabled during operation modes. This anticipatory approach allows bulk voltage adjustment to be prepared beforehand, reducing the need for frequent reactive switching and thereby lowering power consumption while maintaining effective leakage control.

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The patent implements feedback by using switching control signals that are generated based on the actual operation mode state. The bulk voltage generation circuits receive these control signals and adjust bulk voltages accordingly, creating a closed-loop system where voltage adjustment is directly responsive to mode transitions. This feedback mechanism ensures leakage current control is applied only when necessary, avoiding unnecessary switching operations and reducing power consumption.

Inventive Principle:

Principle #23Feedback

2Use of energy by moving object

If bulk voltage levels are optimized for minimum leakage current, then power consumption is reduced, but operation speed may be affected

Engineering Contradiction:

Improvepower consumptionVSAvoidoperation speed

Core Design Contradiction:

Use of energy by moving objectVSSpeed

Solution Approach 1:

The patent applies dynamics by making bulk voltage levels adjustable and mode-dependent rather than fixed. The bulk voltage generation circuits dynamically change voltage levels based on the operation mode: in power-down mode, bulk voltages are set to levels that minimize leakage current, while in operation modes, the voltages are adjusted to optimize operation speed. This dynamic adaptation allows the system to achieve minimum power consumption during standby while maintaining high performance during active operation.

Inventive Principle:

Principle #15Dynamics

3Speed

If switching control signals are generated without delay, then response time is reduced, but unnecessary switching operations increase during frequent mode transitions

Engineering Contradiction:

Improveresponse timeVSAvoidcurrent consumption

Core Design Contradiction:

SpeedVSLoss of energy

Solution Approach 1:

The patent applies preliminary action by generating switching control signals in advance based on predicted mode transitions. The first switching control signal generation circuit generates a signal enabled in synchronization with a delay period after power-down mode entry, and the second circuit generates a signal enabled during operation modes. This anticipatory approach allows bulk voltage adjustment to be prepared beforehand, reducing the need for frequent reactive switching and thereby lowering power consumption while maintaining effective leakage control.

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The patent implements periodic action by using delay periods to space out switching operations. The first switching control signal is enabled in synchronization with a first delay period after power-down mode entry, and the second switching control signal is enabled during operation modes. This periodic timing approach prevents unnecessary frequent switching by introducing controlled intervals, reducing energy loss while maintaining adequate response time for legitimate mode transitions.

Inventive Principle:

Principle #19Periodic action

Data Source

PatentUS9577636B1Substate bias voltage generation circuits and methods to control leakage in semiconductor memory device

Publication Date: 2017.02.21 SK HYNIX INC

AI summary

A semiconductor device may be provided. The semiconductor device may include a first switching control signal generation circuit configured to generate a first switching control signal which is enabled in synchronization with a time when a first delay period has passed from a time when a power-down mode is entered. The semiconductor device may include a second switching control signal generation circuit configured to generate a second switching control signal which is enabled during a period from a time when a read operation mode or a write operation mode is entered to a time when a second delay period has passed.