Semiconductor Substrate Alignment Marks with Varying Lengths

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Solution Overview

Problem

Current semiconductor device packages face challenges in accurately determining alignment between layers due to limitations in manufacturing alignment marks, leading to reduced accuracy in measuring shifts, deviations, or drifts, which affects the performance of multi-layered substrates.

Innovation Solution

Incorporating a first dielectric layer with a first patterned conductive layer and a first set of alignment marks, where the lengths of the alignment marks are different from each other, allowing for improved alignment and measurement of shifts or deviations between layers, enhancing the accuracy of layer alignment in semiconductor device packages.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If conventional alignment marks with uniform dimensions are used, then the manufacturing process is simple, but the measurement precision of alignment accuracy deteriorates

Engineering Contradiction:
Improvealignment accuracyVSAvoidalignment mark structure
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent applies asymmetry by designing alignment marks with different lengths instead of uniform dimensions. Specifically, the alignment marks include a first alignment mark with a first length and a second alignment mark with a second length different from the first length. This asymmetric configuration enables more precise measurement of alignment accuracy by providing multiple reference points with varying dimensions, thereby resolving the contradiction between measurement precision and device complexity.

Inventive Principle:
Principle #4Asymmetry

2Measurement precision

If alignment marks with different lengths are used, then the alignment measurement precision is improved, but the manufacturing complexity increases

Engineering Contradiction:
Improveshift measurement accuracyVSAvoidalignment mark fabrication
Core Design Contradiction:
Measurement precisionVSEase of manufacture

Solution Approach 1:

The patent applies parameter changes by varying the length parameter of alignment marks while maintaining their basic structural characteristics. The alignment marks are configured with different lengths (first length vs. second length) to enable more accurate shift measurements between layers. This parameter variation approach improves measurement precision while keeping the manufacturing process relatively straightforward, as it only requires modifying one dimension parameter rather than fundamentally changing the fabrication methodology.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS11296001B2Semiconductor device package and method of manufacturing the same
Publication Date: 2022.04.05 ADVANCED SEMICON ENG INC
  • US11296001B2 patent drawing
  • US11296001B2 patent drawing
  • US11296001B2 patent drawing

AI summary

A package substrate includes a first dielectric layer, a first patterned conductive layer and a first set of alignment marks. The first patterned conductive layer is disposed on the first dielectric layer. The first set of alignment marks is disposed on the first dielectric layer and adjacent to a first edge of the first dielectric layer. The first set of alignment marks includes a plurality of alignment marks. Distances between the alignment marks of the first set of alignment marks and the first edge are different from each other.