Substrate Bias Circuit for CMOS Power-Up Latch-Up Prevention
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Solution Overview
Problem
Integrated circuits with CMOS transistors face excessive current consumption and potential latch-up during power-up due to undesirable current paths created by reverse back biasing techniques, especially in high temperature conditions.
Innovation Solution
A substrate bias circuit that reverse back biases the N-well and P-well terminals by providing a voltage greater than the power supply to the N-well and lower than ground to the P-well, using diode-connected transistors to prevent latch-up by coupling substrate terminals to power supply terminals during power-up, and employing a depletion N-channel transistor and back-to-back diode-connected transistors to manage voltage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If reverse back biasing is applied during power-up, then transistor threshold voltages can be adjusted to reduce leakage current, but excessive current consumption and latch-up may occur
Solution Approach 1:
The substrate bias circuit is enabled before the power supply voltage is applied to the CMOS circuit. This preliminary action ensures that the substrate terminals are properly biased before any potential current paths can form, preventing latch-up while still allowing reverse back biasing to reduce leakage current during normal operation
Solution Approach 2:
A dedicated substrate bias circuit acts as an intermediary between the power supply and the substrate terminals of the CMOS transistors. This intermediate circuit controls the timing and level of substrate biasing, ensuring proper operation while preventing harmful current paths
2Loss of energy
If reverse back biasing is applied during power-up, then power consumption can be reduced, but undesirable current paths through series-connected transistors are created
Solution Approach 1:
The substrate bias is applied in advance before the main power supply voltage is established. This preliminary biasing prevents the formation of undesirable current paths through series-connected transistors by ensuring proper substrate potential is established first
Solution Approach 2:
The substrate bias circuit serves as an intermediary that controls the substrate potential independently of the main power supply timing, preventing harmful current paths while enabling power consumption reduction through reverse back biasing
Data Source
AI summary
A substrate bias circuit and method for biasing a substrate are provided. A substrate bias circuit includes a first voltage source, a second voltage source, a diode coupled between the first voltage source and the second voltage source, and a plurality of transistors, each transistor in the plurality of transistors having a substrate terminal. In one example, the first voltage source supplies, via the diode, the substrate terminal of a first transistor of the plurality of transistors during a power-up, and the second voltage source supplies the substrate terminal of the first transistor after the power-up.