Substrate Bias Detection Circuit Using Frequency Comparison
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Solution Overview
Problem
The existing substrate bias generating circuits for semiconductor devices require four comparators to detect two substrate bias voltages, leading to increased power consumption.
Innovation Solution
A technique involving a voltage boost circuit, a voltage drop circuit, and a logic circuit block that compares the frequencies of clock signals generated by these circuits to detect substrate bias voltages at low power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If four comparators are used to detect two substrate bias voltages, then the detection accuracy is improved, but the power consumption increases
Solution Approach 1:
The patent merges the functions of four separate comparators into a single comparator by combining the two substrate bias voltages (VBP and VBN) into a single composite signal. The comparator then compares this composite signal against a reference voltage, achieving the detection of both substrate bias voltages simultaneously while using only one comparator circuit, thereby reducing power consumption while maintaining detection accuracy.
2Reliability
If four comparators are used to detect substrate bias voltages, then the detection reliability is improved, but the device complexity increases
Solution Approach 1:
The patent combines multiple detection functions into a single comparator circuit by processing both substrate bias voltages through signal combination circuits. This merging approach reduces the number of independent comparator circuits from four to one, simplifying the overall device architecture while maintaining the reliability of substrate bias voltage detection through the unified comparison mechanism.
Data Source
AI summary
A technique capable of detecting a substrate bias voltage at a low power consumption is provided. The technique including: a voltage boost circuit outputting a boost voltage based on a first clock signal having a first frequency; a voltage drop circuit outputting a drop voltage based on a second clock signal having a second frequency; and a logic circuit block comparing the first frequency and the second frequency and outputting a comparison result between the first frequency and the second frequency in accordance with predetermined criteria is provided.


