Substrate-Biased Polysilicon Diode for ESD Protection
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Solution Overview
Problem
Semiconductor integrated circuits face challenges in electrostatic discharge (ESD) protection due to significant leakage current and increased parasitic capacitance in existing diode structures, particularly in deep-submicron CMOS processes, which can damage ICs and affect RF applications.
Innovation Solution
The development of a substrate-biased polysilicon diode (SBPD) that eliminates bottom junction capacitance and reduces leakage current by being disposed over shallow trench isolations, providing improved turn-on speed and flexibility in RF IC applications, with a structure comprising a p-type, n-type, and intrinsic portion, and a well region biased for controlling the diode's operation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If an STI-bound diode is used for ESD protection, then the diode structure is compact and integrates well with shallow-trench isolations, but significant leakage current occurs due to interference between silicide layer and STIs
Solution Approach 1:
The patent extracts the problematic silicide layer from the diode structure by forming the diode entirely within the polysilicon gate material. The P+ diffusion region is defined by the polysilicon gate boundaries, eliminating the silicide-STI interference that causes leakage current in conventional STI-bound diodes.
Solution Approach 2:
The polysilicon gate serves as an intermediary structure that defines the diode boundaries without requiring silicide layers. By using the polysilicon gate edges as the diode boundaries, the patent avoids direct contact between silicide and STI, thereby eliminating the leakage path.
2Reliability
If a polysilicon-bound diode is used to eliminate leakage current, then leakage current is reduced by eliminating silicide-STI interference, but total parasitic capacitance increases due to added sidewall junction capacitance
Solution Approach 1:
The patent applies local quality by creating a localized P+ diffusion region precisely within the polysilicon gate boundaries. This localized doping approach ensures that the depletion region is confined to the area directly under the polysilicon gate, minimizing sidewall junction capacitance while maintaining low leakage current.
3Reliability
If conventional diodes are used in deep-submicron CMOS processes, then ESD protection is provided, but bottom junction capacitance increases affecting RF performance
Solution Approach 1:
The patent transitions from a vertical diode structure (with bottom junction capacitance extending into the substrate) to a horizontal diode structure defined by polysilicon gate boundaries. This dimensional change confines the depletion region laterally, eliminating the bottom capacitance component that degrades RF performance.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The SBPD offers reduced parasitic capacitance, lower leakage current, and cost-effectiveness by minimizing silicon area usage, enhancing ESD protection and RF performance while maintaining minimal voltage dependency.
Implementation Method 1
a layer of polysilicon for receiving the incident optical signal and converting the incident optical signal into an electrical signal
Implementation Method 2
wherein the well region is biased to control the layer of polysilicon for providing the electrical signal
Data Source
AI summary
An integrated circuit device for converting an incident optical signal into an electrical signal comprises a semiconductor substrate, a well region formed inside the semiconductor substrate, a dielectric layer formed over the well region, and a layer of polysilicon for receiving the incident optical signal, formed over the dielectric layer, including a p-type portion, an n-type portion and an undoped portion disposed between the p-type and n-type portions, wherein the well region is biased to control the layer of polysilicon for providing the electrical signal.