Semiconductor Substrate Bonding with Thermal Expansion Electrode Joining

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Existing chip lamination techniques for semiconductor devices face challenges in achieving secure electrical connections due to issues such as electrode recesses leading to insufficient connections and electrode projections causing unintended electrical connections during the chemical mechanical polishing process.

Innovation Solution

A method of manufacturing semiconductor devices involves embedding electrodes in insulating layers on joint surfaces of substrates, followed by chemical mechanical polishing to form recesses or projections. Uniform insulating films are then laminated, openings are etched in these films covering the electrodes, and the substrates are joined and heat-treated to allow electrode materials to expand and connect securely through these openings.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If chemical mechanical polishing is performed on joint surfaces to planarize them, then the surfaces become flat for proper alignment, but electrode sections may form recesses or projections that compromise electrical connection quality

Engineering Contradiction:
Improvejoint surface planarityVSAvoidelectrical connection quality
Core Design Contradiction:
Manufacturing precisionVSReliability

Solution Approach 1:

The patent applies preliminary action by forming a protective film on the electrode sections before chemical mechanical polishing. This protective film prevents the electrodes from being over-polished and forming recesses or projections that would compromise electrical connection quality. The film is applied in advance to protect vulnerable areas during the polishing process that is necessary for achieving joint surface planarity.

Inventive Principle:
Principle #10Preliminary action

2Shape

If electrode sections are formed into recesses during polishing, then the surrounding structure is preserved, but electrical connection between electrodes becomes insufficient

Engineering Contradiction:
Improveelectrode geometryVSAvoidelectrical connection
Core Design Contradiction:
ShapeVSReliability

Solution Approach 1:

The protective film is applied before polishing to prevent the electrode sections from forming recesses. By having this protective layer in place beforehand, the polishing process removes material uniformly across the joint surface without creating recesses that would lead to insufficient electrical connection between electrodes.

Inventive Principle:
Principle #10Preliminary action

3Shape

If electrode sections are formed into projections during polishing, then the surrounding structure is preserved, but metallic material is crushed and extended causing unintended electrical connection with adjacent electrodes

Engineering Contradiction:
Improveelectrode geometryVSAvoidunintended electrical connection
Core Design Contradiction:
ShapeVSObject-generated harmful factors

Solution Approach 1:

The protective film is applied before polishing to prevent electrode sections from forming projections. This preliminary protective layer ensures that the polishing process does not create excessive material accumulation that would be crushed and extended during joining, thereby preventing unintended electrical connection with adjacent electrodes.

Inventive Principle:
Principle #10Preliminary action

4Reliability

If polysilicon films are formed and planarized to address recessed electrodes, then electrical connection is improved, but the process complexity increases

Engineering Contradiction:
Improveelectrical connectionVSAvoidmanufacturing process
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent extracts the protective function from the polishing process itself by applying a separate protective film. Instead of using complex multi-step processes like forming and planarizing polysilicon films, the solution extracts the essential protective action into a simple film application step that prevents the problem before it occurs, thereby improving electrical connection reliability without significantly increasing process complexity.

Inventive Principle:
Principle #2Taking out (Extraction)

5Reliability

If silicon nitride films are formed and processed to address projected electrodes, then electrical connection is achieved, but the manufacturing difficulty increases

Engineering Contradiction:
Improveelectrical connectionVSAvoidprocess feasibility
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The patent extracts the protective function into a simple preliminary film application step, avoiding the complex multi-step process of forming silicon nitride films, planarizing them, etching openings, and performing thermal expansion. This extracted protective approach achieves the same reliability benefit with much greater ease of manufacture.

Inventive Principle:
Principle #2Taking out (Extraction)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This method ensures more secure electrical connections between electrodes on facing substrates by controlling the formation of recesses and projections during polishing and utilizing heat treatment to expand electrode materials for effective joining.

Implementation Method 1

The substrates to be laminated together are subjected, before bonding, to polishing or grinding of the joint surfaces by chemical mechanical polishing technique to planarize the joint surfaces.

Methodology Applied
Scientific EffectChemical mechanical polishing:

Implementation Method 2

a sixth step of heating the first substrate and the second substrate joined to each other, causing the electrode material to expand and project through the opening, and joining the corresponding electrodes to each other.

Methodology Applied
Scientific EffectThermal expansion: Thermal Expansion

Data Source

PatentUS12211819B2Method of manufacturing semiconductor device and semiconductor device
Publication Date: 2025.01.28 SONY SEMICON SOLUTIONS CORP
  • US12211819B2 patent drawing
  • US12211819B2 patent drawing
  • US12211819B2 patent drawing

AI summary

Electrical connection between electrodes provided respectively at facing positions in joint surfaces of substrates to be joined by chip lamination technology is conducted more securely. A method of manufacturing a semiconductor device includes: a first step of embedding electrodes in insulating layers exposed to the joint surfaces of a first substrate and a second substrate; a second step of subjecting the joint surfaces of the first substrate and the second substrate to chemical mechanical polishing, to form the electrodes into recesses recessed as compared to the insulating layers; a third step of laminating insulating films of a uniform thickness over the entire joint surfaces; a fourth step of forming an opening by etching in at least part of the insulating films covering the electrodes of the first substrate and the second substrate; a fifth step of causing the corresponding electrodes to face each other and joining the joint surfaces of the first substrate and the second substrate to each other; and a sixth step of heating the first substrate and the second substrate joined to each other, causing the electrode material to expand and project through the openings, and joining the corresponding electrodes to each other.