Package Substrate Cavity Design for Solder Bridging Prevention
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Solution Overview
Problem
The increasing demand for semiconductor devices with fine pitch designs poses challenges in flip-chip assembly, where high-temperature solder reflow can lead to short-circuits due to solder bridging and overspreading, reducing the reliability of the package by decreasing the height between the semiconductor device and the package substrate, making it difficult for the underfill layer to interpose effectively.
Innovation Solution
A package substrate with a dielectric layer and embedded conductive layers, where the conductive layers are arranged to create cavities that confine the solder, preventing bridging and allowing for reduced interconnection wire height, and an annular reinforcing structure enhances the package's strength and reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If solder is reflowed at high temperature during flip-chip assembly, then bonding between semiconductor device and package substrate is achieved, but solder bridging occurs causing short-circuits
Solution Approach 1:
The patent divides the bonding area into separate cavities, each containing individual solder balls. These cavities are formed by removing portions of the dielectric layer and filling with solder, creating isolated bonding regions that prevent solder bridging between adjacent bonds while maintaining reliable bonding within each cavity.
Solution Approach 2:
The patent introduces an underfill layer as an intermediary substance that fills the gap between the semiconductor device and package substrate. This underfill layer restricts solder flow during reflow, prevents solder from spreading along wire layers, and maintains proper spacing to avoid bridging while allowing effective bonding.
2Object-affected harmful factors
If solder mask is used to restrict solder flow, then solder bridging is prevented, but fine pitch design is compromised due to mask width requirements
Solution Approach 1:
Instead of using a continuous solder mask layer that requires width for bridging prevention, the patent segments the solder into discrete balls contained within individual cavities. This eliminates the need for solder mask width while maintaining precise spacing for fine pitch designs, as each solder ball is physically isolated in its own cavity.
Solution Approach 2:
The patent moves the solder confinement function from the lateral dimension (solder mask width) to the vertical dimension (cavity depth). By forming cavities that extend downward from the surface, the solder is restricted vertically within the cavity rather than laterally by mask width, enabling fine pitch designs without compromising bridging prevention.
3Area of stationary object
If solder is allowed to spread along wire layer, then bonding area increases, but height between device and substrate decreases making underfill interposition difficult
Solution Approach 1:
The patent segments the bonding structure into discrete cavities with controlled dimensions. Each cavity contains solder balls at a specific height level, preventing solder from spreading laterally along the wire layer. This maintains a consistent gap height between the semiconductor device and package substrate, enabling effective underfill interposition while providing sufficient bonding area through multiple distributed cavities.
Data Source
AI summary
A manufacturing method of a package substrate is provided. A conductive substrate is provided. A first photoresist layer is patterned to form first openings. A first conductive layer is formed in the first openings. A second photoresist layer is patterned to form second openings. A second conductive layer contacting the first conductive layer is formed in the second openings. The first and second photoresist layers are removed. A dielectric layer covers the first, second conductive layers and a portion of the conductive substrate. A portion of the dielectric layer is removed. A third photoresist layer is patterned to form a third opening. A portion of the conductive substrate is removed to form a fourth opening. The third photoresist layer is removed. A fourth photoresist layer is patterned to form a fifth opening. A bonding pad is formed in the fifth opening. The fourth photoresist layer is removed.