Substrate Cavity Via Coupling for Stable Embedded Die Packaging
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Solution Overview
Problem
The limited space on the sides of a host component in IC packages restricts the number of IC chips that can be assembled, and incorporating passive components like capacitors can lead to shifting and rotating issues during encapsulation, affecting electrical interconnects.
Innovation Solution
The integration of a die within a cavity in a substrate, using conductive vias that extend through both the substrate and a bond film or solder features, securing the die and minimizing shifting, with optional hermetic sealing and electrical routing structures.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If passive components like capacitors are incorporated on the side of a host component, then voltage regulation circuitry is provided, but the components may shift and rotate during encapsulation, affecting electrical interconnects
Solution Approach 1:
The passive component is placed inside a cavity formed in the substrate, nesting it within the package structure. This containment prevents the component from shifting or rotating during encapsulation while maintaining its electrical connections through conductive vias that extend through the substrate to contact pads on the component
2Adaptability or versatility
If components are placed on the side of a host component, then functional circuitry is enhanced, but the space available for IC chips is reduced
Solution Approach 1:
Instead of placing components on the two-dimensional surface of the host component where they would consume valuable space, the invention utilizes the third dimension by creating a cavity within the substrate thickness. This allows components to be housed inside the substrate volume, preserving the surface area for IC chip assembly while providing integrated functional circuitry
3Productivity
If the package substrate size is increased to accommodate more IC chips, then the number of IC chips in a multi-die package is increased, but the overall package size increases
Solution Approach 1:
The package substrate is segmented into functional regions: active areas for IC chip assembly and integrated cavities for housing passive components and other devices. This segmentation allows the substrate to efficiently utilize its area, accommodating multiple IC chips without requiring excessive substrate size, as the cavities are embedded within the existing substrate footprint rather than adding to it
Data Source
AI summary
An apparatus includes a substrate, a cavity within the substrate, and a die within the cavity. The substrate has an exterior surface. The cavity includes a first surface and a second surface opposite the first surface. The die includes a discrete component, a first side, a second side opposite the first side, and conductive features at the first side. In an embodiment, a bond film is between the first surface and the first side. A plurality of conductive vias extend from the exterior surface through the substrate and bond film to the conductive features. In an embodiment, the bond film may be omitted. The plurality of conductive vias extend from the exterior surface through the substrate. The conductive features of the die are coupled with the conductive vias by solder features, and the second side of the die is spaced away from the second surface.