Substrate Contact Integration in Transistor Gate Structures

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Solution Overview

Problem

Current methods for forming substrate contacts in transistors are inefficient, leading to larger integrated circuit areas due to the need for separate structures for proximity gates and substrate contacts, which complicates semiconductor processing and increases the chip size.

Innovation Solution

The formation of substrate contacts using gate structures, where a first gate structure is utilized as a substrate contact and a second gate structure as a transistor gate, allowing for the reduction of chip area by integrating these functions into existing lithographic processes and improving CMP polishing uniformity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If separate structures are used for proximity gates and substrate contacts, then the transistor can be formed with proper electrical characteristics, but the integrated circuit area increases and device complexity increases

Engineering Contradiction:
Improveelectrical characteristicsVSAvoidintegrated circuit area
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The patent merges the substrate contact structure with the proximity gate structure by forming the substrate contact within the same trench as the proximity gate. This integration eliminates the need for separate structures, reducing the overall area while maintaining proper electrical characteristics for both functions

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The proximity gate structure is designed to serve dual functions: as a proximity gate for controlling electrical characteristics and as a substrate contact for electrical connection to the substrate. This multi-functionality reduces the number of separate structures needed, thereby reducing integrated circuit area

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Reliability

If separate structures are used for proximity gates and substrate contacts, then the transistor can be formed with proper electrical characteristics, but the device complexity and processing complexity increase

Engineering Contradiction:
Improveelectrical characteristicsVSAvoidstructure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent combines the substrate contact and proximity gate into a single integrated structure formed in one trench, eliminating the need for separate fabrication processes and reducing device complexity while maintaining proper electrical characteristics

Inventive Principle:
Principle #5Merging (Combining)

3Reliability

If separate structures are used for proximity gates and substrate contacts, then the transistor can be formed with proper electrical characteristics, but the manufacturing efficiency decreases

Engineering Contradiction:
Improveelectrical characteristicsVSAvoidmanufacturing efficiency
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The integrated structure allows both the substrate contact and proximity gate to be formed in a single trench during the same fabrication process, reducing the number of manufacturing steps and improving production efficiency while maintaining proper electrical characteristics

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS10038081B1Substrate contacts for a transistor
Publication Date: 2018.07.31 NXP USA INC
  • US10038081B1 patent drawing
  • US10038081B1 patent drawing
  • US10038081B1 patent drawing

AI summary

In some embodiments, a substrate contact is formed by forming a first gate structure and a second gate structure. The first gate structure is formed in a first volume in a first area of the wafer and the second gate structure is formed in a second volume in a second area of the wafer. The gate dielectric is removed from the wafer in a first area of the wafer but remains in the second area. A first sidewall spacer formed for the gate structure and a second sidewall spacer is formed for the second gate structure. In some embodiments, the first gate structure can be utilized as a substrate contact and the second gate structure can be utilized as a gate of a transistor. In other embodiments, the first gate structure and the second gate structure can be removed and a metal gate material can be deposited in opening for forming a substrate contact and a metal gate, respectively. In some embodiments, the first gate structure (or the replacement metal gate structure) can be used as part of a body contact to bias the body of a transistor. In other embodiments, the first gate structure (or replacement metal gate structure) can be used as part of a current terminal contact for the transistor.