Semiconductor Substrate Layout Balancing Cooling and Thermal Distortion
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Solution Overview
Problem
Semiconductor devices with semiconductor elements face distortion issues due to thermal expansion differences between wiring layers and heat dissipation layers, affecting productivity and reliability.
Innovation Solution
A semiconductor device configuration where wiring layers and heat dissipation layers are designed to overlap, with specific orientations and thicknesses, and are covered by a sealing resin, minimizing thermal distortion on the insulating substrate without compromising heat dissipation performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Temperature
If the thickness of both the wiring layers and heat dissipation layer is increased to improve heat dissipation performance, then heat dissipation performance is improved, but thermal expansion volume difference between the wiring layers and heat dissipation layer increases, rendering more prominent distortion of the insulating substrate
Solution Approach 1:
The patent applies local quality by making the heat dissipation layer have a non-uniform thickness distribution, with greater thickness at regions corresponding to high heat generation areas (semiconductor element locations) and reduced thickness at other regions. This localized thickness variation optimizes heat dissipation where needed while reducing overall thermal expansion volume and substrate distortion.
Solution Approach 2:
The patent changes the thickness parameter of the heat dissipation layer from a uniform value to a variable value that depends on the thermal load distribution. By adjusting the thickness parameter locally across different regions of the heat dissipation layer, the patent achieves better heat dissipation performance while controlling thermal expansion effects on the substrate.
2Temperature
If the thickness of both the wiring layers and heat dissipation layer is increased to improve heat dissipation performance, then heat dissipation performance is improved, but the overall thermal expansion volume increases, affecting productivity and reliability
Solution Approach 1:
The heat dissipation layer is designed with locally varied thickness, being thicker only where semiconductor elements generate heat and thinner elsewhere. This localized approach provides effective heat dissipation at hot spots while minimizing the total volume of the heat dissipation layer and its thermal expansion contribution.
Solution Approach 2:
Instead of uniformly increasing heat dissipation layer thickness across the entire substrate, the patent applies excessive thickness only partially at critical heat generation regions. This partial action achieves sufficient heat dissipation performance while avoiding unnecessary material volume and thermal expansion elsewhere.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The configuration effectively suppresses substrate distortion while maintaining heat dissipation efficiency by aligning thermal expansion distributions and ensuring even heat distribution across the substrate.
Implementation Method 1
a plurality of heat dissipation layers 22 each having a second obverse face 221 oriented in a same direction as the first obverse face 211 and a second reverse face 222 oriented in an opposite direction to the second obverse face in the thickness direction
Implementation Method 2
at a certain temperature, the thermal expansion volume of the heat dissipation layer is larger than that of the overall thermal expansion volume of the plurality of wiring layers
Data Source
AI summary
A semiconductor device includes an insulating substrate, wiring layers, heat dissipation layers, a semiconductor element, and a sealing resin. The wiring layers each have a first obverse face and a first reverse face oriented in opposite directions in a thickness direction of the substrate. The first reverse faces of the wiring layers are connected to the substrate. The heat dissipation layers each have a second obverse face oriented in the same direction as the first obverse face, and a second reverse face oriented opposite to the second obverse face in the thickness direction. The heat dissipation layers are located opposite to the plurality of wiring layers in the thickness direction with respect to the substrate. The second obverse faces of the heat dissipation layers are connected to the substrate. The semiconductor element is connected to one of the first obverse faces of the wiring layers. The sealing resin covers the substrate, the wiring layers, and the semiconductor element. As viewed in the thickness direction, the wiring layers overlap with the heat dissipation layers, respectively.