Semiconductor Substrate Dummy Pads for Uniform Solder Volume
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Solution Overview
Problem
Conventional semiconductor package manufacturing techniques face defects due to positioning errors in solder pattern openings, leading to uneven solder pattern volumes on contact pads, especially on the outermost parts of the substrate, causing bumping defects during chip connection.
Innovation Solution
A substrate design featuring dummy contact pads arranged alongside the contact pads with solder resist patterns that create uniform solder patterns on contact pads and distinct dummy solder patterns on dummy contact pads, ensuring consistent spacing and volume, thereby mitigating the impact of positional errors during solder pattern formation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If solder resist film is patterned to form openings exposing contact pads, then solder patterns can be formed on contact pads, but positional errors in opening formation cause uneven solder pattern volumes especially on outermost contact pads
Solution Approach 1:
The patent applies local quality by differentiating the treatment of outermost contact pads versus inner contact pads. Dummy contact pads are added specifically at the outermost positions with different solder resist opening patterns, creating localized compensation mechanisms only where positioning errors cause problems, rather than uniformly changing the entire substrate design.
Solution Approach 2:
The patent implements preliminary action by pre-compensating for expected positioning errors through asymmetric solder resist opening designs. The openings for dummy contact pads are intentionally designed with different dimensions or positions beforehand, so that when solder is applied, the volume is automatically compensated for the anticipated misalignment, preventing defects before they occur.
2Area of stationary object
If contact pads are arranged on outermost parts of substrate, then substrate area is utilized efficiently, but solder pattern volume becomes uneven due to positioning errors
Solution Approach 1:
The patent maintains efficient substrate area utilization by only modifying the outermost contact pad regions with dummy contact pads and asymmetric openings, while leaving the majority of contact pads unchanged. This localized approach preserves overall area efficiency while addressing the specific problem at boundary regions.
Solution Approach 2:
The patent uses dummy contact pads as copies or replicas of real contact pads, placed at strategic outermost positions. These dummy pads replicate the structure and soldering process but serve as compensation elements, allowing the system to test and correct for positioning errors without affecting the functional contact pads.
3Ease of manufacture
If solder resist film patterning is performed with standard precision, then manufacturing process is simple, but unavoidable positional errors occur causing solder volume variation
Solution Approach 1:
The patent applies beforehand cushioning by designing asymmetric solder resist openings and dummy contact pads that act as buffers against positioning errors. These features are built into the design beforehand to absorb or compensate for the expected variations in opening position, cushioning the impact of manufacturing tolerances on solder pattern uniformity.
Solution Approach 2:
The patent changes the parameters of solder resist openings for dummy contact pads, making them different in size, shape, or position compared to standard contact pads. This parameter differentiation allows the outermost pads to compensate for positioning errors while maintaining the same simple patterning process for all pads.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design prevents bumping defects by maintaining uniform solder pattern volumes on contact pads, even with unavoidable positional errors in solder resist film patterning, ensuring reliable electrical connections between semiconductor chips and the substrate.
Implementation Method 1
the solder paste film is melted in order to take advantage of the phenomenon of the solder gathering towards and to be collected at each contact pad
Data Source
AI summary
The present invention relates to a substrate for a semiconductor package and a semiconductor package having the same. A substrate for a semiconductor package includes a substrate body; a contact pad group including a plurality of contact pads parallely arranged at a determined interval on a surface of the substrate body; dummy contact pads arranged at both sides of the contact pad group, respectively; and solder resist patterns covering the substrate body and having openings exposing the dummy contact pads and the contact pad group. When bumping the semiconductor chip having the bumps to the solders arranged on the contact pads formed on the substrate, the bumping defect caused due to different volumes of each solder can be prevented.